Digital calibration technique using a signed counter for charge pump mismatch in phase-locked loops

Chan Hui Jeong, Kyu Young Kim, Chan Keun Kwon, Hoonki Kim, Soo Won Kim

    Research output: Contribution to journalArticlepeer-review

    8 Citations (Scopus)

    Abstract

    The authors adopt a digital technique to calibrate the current mismatch of the charge pump in phase-locked loops. The proposed digital calibration technique using a signed counter reduces the calibration time up to a minimum of 64% as compared with the other techniques. This technique is designed by a standard 0.18 μm CMOS technology. The calibration time is 32.8 μs, the average power is 6.2 mW at a 1.8 V power supply and the effective area is 0.263 mm2.

    Original languageEnglish
    Pages (from-to)313-318
    Number of pages6
    JournalIET Circuits, Devices and Systems
    Volume7
    Issue number6
    DOIs
    Publication statusPublished - 2013

    ASJC Scopus subject areas

    • Control and Systems Engineering
    • Electrical and Electronic Engineering

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