Distance-aware L2 cache organizations for scalable multiprocessor systems

Sung Woo Chung, Hyong Shik Kim, Chu Shik Jhon

Research output: Contribution to journalArticlepeer-review

Abstract

In order to provide the scalability to the multiprocessor systems, it is important to keep the remote memory access time in bounds so that it does not impose much additional overhead as the system grows. In this paper, we suggest an LRU/distance-aware combined second-level(L2) cache for scalable CC-NUMA multiprocessors, which is composed of a traditional LRU cache and an additional distance-aware cache that maintains the distance information of individual cache block for replacement purposes. The LRU cache selects a victim using age information as it typically does, while the distance-aware cache does using distance information. Both work together to reduce effectively the overall distance the cache miss goes through by keeping long-distance blocks as well as recently used blocks. It has been observed that the proposed cache outperforms the traditional LRU cache by up to 28% in the execution time. It is also found to perform even better than an LRU cache of twice the size.

Original languageEnglish
Pages (from-to)368-381
Number of pages14
JournalJournal of Systems Architecture
Volume51
Issue number6-7
DOIs
Publication statusPublished - 2005 Jun
Externally publishedYes

Bibliographical note

Funding Information:
This work was supported by the Korea Research Foundation Grant (KRF-2002-003-D00285).

Copyright:
Copyright 2008 Elsevier B.V., All rights reserved.

Keywords

  • CC-NUMA
  • Cache replacement policy
  • Distance-awareness
  • L2 cache organization
  • Scalable multiprocessor systems

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture

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