Do we need wide flits in Networks-on-Chip?

Junghee Lee, Chrysostomos Nicopoulos, Sung Joo Park, Madhavan Swaminathan, Jongman Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

36 Citations (Scopus)


Packet-based Networks-on-Chip (NoC) have emerged as the most viable candidates for the interconnect backbone of future Chip Multi-Processors (CMP). The flit size (or width) is one of the fundamental design parameters within a NoC router, which affects both the performance and the cost of the network. Most studies pertaining to the NoC of general-purpose microprocessors adopt a certain flit width without any reasoning or explanation. In fact, it is not easy to pinpoint an optimal flit size, because the flit size is intricately intertwined with various aspects of the system. This paper aims to provide a guideline on how to choose an appropriate flit width. It will be demonstrated that arbitrarily choosing a flit width without proper investigation may have serious repercussions on the overall behavior of the system.

Original languageEnglish
Title of host publicationProceedings - 2013 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2013
PublisherIEEE Computer Society
Number of pages6
ISBN (Print)9781479913312
Publication statusPublished - 2013
Externally publishedYes
Event2013 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2013 - Natal, Brazil
Duration: 2013 Aug 52013 Aug 7

Publication series

NameProceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
ISSN (Print)2159-3469
ISSN (Electronic)2159-3477


Conference2013 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2013


  • Flit Size/Width
  • Link Width Optimization
  • Network-on-Chip

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering
  • Electrical and Electronic Engineering


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