Edge pursuit comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC

Minseob Shim, Seokhyeon Jeong, Paul Myers, Suyoung Bang, Junhua Shen, Chulwoo Kim, Dennis Sylvester, David Blaauw, Wanyeong Jung

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents a new energy-efficient ring oscillator collapse-based comparator, which is called edge-pursuit comparator (EPC) and demonstrated it in a 15-bit SAR ADC. The comparator automatically adjusts the performance according to its input difference without any control, eliminating unnecessary energy spent on coarse comparisons. The employed SAR ADC supplements a 10-bit differential main CDAC with a 5-bit common-mode CDAC which uses common to differential gain tuning to improves linearity by reducing the effect of switch parasitic capacitance. A test chip fabricated in 40nm CMOS shows 74.12 dB SNDR and 173.4 dB FOMs. The comparator consumes 104 nW with the full ADC consuming 1.17 μW.

Original languageEnglish
Title of host publicationASP-DAC 2018 - 23rd Asia and South Pacific Design Automation Conference, Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages295-296
Number of pages2
ISBN (Electronic)9781509006021
DOIs
Publication statusPublished - 2018 Feb 20
Event23rd Asia and South Pacific Design Automation Conference, ASP-DAC 2018 - Jeju, Korea, Republic of
Duration: 2018 Jan 222018 Jan 25

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
Volume2018-January

Other

Other23rd Asia and South Pacific Design Automation Conference, ASP-DAC 2018
Country/TerritoryKorea, Republic of
CityJeju
Period18/1/2218/1/25

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design

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