Abstract
This paper presents a new energy-efficient ring oscillator collapse-based comparator, which is called edge-pursuit comparator (EPC) and demonstrated it in a 15-bit SAR ADC. The comparator automatically adjusts the performance according to its input difference without any control, eliminating unnecessary energy spent on coarse comparisons. The employed SAR ADC supplements a 10-bit differential main CDAC with a 5-bit common-mode CDAC which uses common to differential gain tuning to improves linearity by reducing the effect of switch parasitic capacitance. A test chip fabricated in 40nm CMOS shows 74.12 dB SNDR and 173.4 dB FOMs. The comparator consumes 104 nW with the full ADC consuming 1.17 μW.
Original language | English |
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Title of host publication | ASP-DAC 2018 - 23rd Asia and South Pacific Design Automation Conference, Proceedings |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 295-296 |
Number of pages | 2 |
ISBN (Electronic) | 9781509006021 |
DOIs | |
Publication status | Published - 2018 Feb 20 |
Event | 23rd Asia and South Pacific Design Automation Conference, ASP-DAC 2018 - Jeju, Korea, Republic of Duration: 2018 Jan 22 → 2018 Jan 25 |
Publication series
Name | Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC |
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Volume | 2018-January |
Other
Other | 23rd Asia and South Pacific Design Automation Conference, ASP-DAC 2018 |
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Country/Territory | Korea, Republic of |
City | Jeju |
Period | 18/1/22 → 18/1/25 |
Bibliographical note
Funding Information:The authors thank TSMC University Shuttle Program for chip fabrication and Analog Devices for partial financial support.
Publisher Copyright:
© 2018 IEEE.
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Computer Science Applications
- Computer Graphics and Computer-Aided Design