Effective Reduction of Hydrogen Diffusion and Reliability Degradation in Peripheral Transistor of Peripheral-Under-Cell (PUC) NAND Flash Memory

Recently, a new structure called PUC has been introduced, in which the periphery is located below the NAND cell to reduce chip area. However, as the SiN-based cell alloy process progresses during the NAND manufacturing process, there is a problem in that excess hydrogen is injected into the peripheral transistor, resulting in degradation of reliability. Therefore, we propose the hydrogen diffusion model in PUC to investigate the degradation of peripheral transistor by excess hydrogen using Sentaurus 3D technology Computer-Aided Design (TCAD) and suggest an optimal process to improve reliability. As a result, by applying the bonding process and adjusting the cell alloy process sequence, the amount of excess hydrogen injection is reduced by 87% and the NBTI lifetime showed about 8.3 times greater result and TDDB breakdown time improved more than 9.1 times compared to the PUC structure made through a sequential process. Additionally, this process effectively alleviates excess hydrogen injection in the NAND cell with an increased number of WL. These results could provide critical insight for designing a PUC that ensures the reliability of peripheral transistor.