Effects of coercive voltage and charge injection on memory windows of metal-ferroelectric-semiconductor and metal-ferroelectric-insulator- semiconductor gate structures

We have prepared Pt/SrBi ₂Ta ₂O ₉ (SBT)/Si metal-ferroelectric-semiconductor (MFS) and Pt/SBT/Y ₂O ₃/Si metal-ferroelectric-insulator-semiconductor (MFIS) ferroelectric gate structures and investigated the changes in memory window with different thickness of SBT and Y ₂O ₃ in the MFS and MFIS. As a result, it is found that the memory window increases with increasing thickness of SBT and decreasing thickness of Y ₂O ₃. The experimental and theoretical analysis reveals that the memory window equals to the difference between the effective coercive voltage (2V _c) applied to the ferroelectric film and the flat band voltage shift due to charge injection (V _ci). Increasing the thickness of SBT, the 2V _c seems to be saturated at higher voltage, whereas the V _ci starts to increase exponentially at the higher gate voltage. In contrast, the V _ci decreases with decreasing thickness of Y ₂O ₃, resulting in the enhancement of the memory window due to the reduction of charge injection.