Abstract
In this study, we investigate the influence of an overlap between the gate and source/drain regions of a-Si:H thin film transistors (TFTs) on their electrical characteristics under tensile or compressive strain through experiment and mechanical simulation. The strain distribution in the a-Si:H TFT for a bending radius of 2 mm reveals that the strain at both ends of the TFT is ten times larger than that at the source-drain current path. The overlap lowers the stress sustained by the TFT in the region comprised between the channel and the gate insulator; therefore, TFTs with the overlap operate even at a tensile strain of 2.54%. In particular, the overlap is remarkably effective on relaxing the stress sustained in the interface between the gate insulator and the gate electrode, consequently improving the electrical stability of the bent TFT.
| Original language | English |
|---|---|
| Article number | 093502 |
| Journal | Applied Physics Letters |
| Volume | 110 |
| Issue number | 9 |
| DOIs | |
| Publication status | Published - 2017 Feb 27 |
Bibliographical note
Funding Information:This work was supported in part by the Mid-career Researcher Program (Nos. NRF-2013R1A2A1A03070750, NRF-2015R1A2A1A15055437, and NRF-2016R1E1A1A02920171) and the Basic Science Research Program (No. NRF-2015R1D1A1A01057641) through the National Research Foundation of Korea (NRF), funded by the Ministry of Education, Science and Technology, Samsung Display Co. Ltd., the Brain Korea 21 Plus Project, and the Korea University Grant.
Publisher Copyright:
© 2017 Author(s).
ASJC Scopus subject areas
- Physics and Astronomy (miscellaneous)