Electrical characteristics of polycrystalline Si layers embedded into high-k Al                         2                         O                         3                          gate layers

Byoungjun Park; Kyoungah Cho; Sangsig Kim

doi:10.1016/j.apsusc.2008.03.064

Electrical characteristics of polycrystalline Si layers embedded into high-k Al ₂ O ₃ gate layers

Byoungjun Park, Kyoungah Cho, Sangsig Kim

Research output: Contribution to journal › Article › peer-review

2 Citations (Scopus)

Abstract

The electrical characteristics of polycrystalline Si (poly Si) layers embedded into high-k Al ₂ O ₃ (alumina) gate layers are investigated in this work. The capacitance versus voltage (C-V) curves obtained from the metal-alumina-polysilicon-alumina-silicon (MASAS) capacitors exhibit significant threshold voltage shifts, and the width of their hysteresis window is dependent on the range of the voltage sweep. The counterclockwise hysteresis observed in the C-V curves indicates that electrons originating from the p-type Si substrate in the inversion condition are trapped in the floating gate layer consisting of the poly Si layer present between the top and bottom Al ₂ O ₃ layers in the MASAS capacitor. Also, current versus voltage (I-V) measurements are performed to examine the electrical characteristics of the fabricated capacitors. The I-V measurements reveal that our MASAS capacitors show a very low leakage current density, compared to the previously reported results.

Original language	English
Pages (from-to)	7905-7908
Number of pages	4
Journal	Applied Surface Science
Volume	254
Issue number	23
DOIs	https://doi.org/10.1016/j.apsusc.2008.03.064
Publication status	Published - 2008 Sept 30

Keywords

Alumina
High-k
Memory
Polycrystalline silicon

ASJC Scopus subject areas

General Chemistry
Condensed Matter Physics
General Physics and Astronomy
Surfaces and Interfaces
Surfaces, Coatings and Films

Access to Document

10.1016/j.apsusc.2008.03.064

Cite this

Electrical characteristics of polycrystalline Si layers embedded into high-k Al ₂ O ₃ gate layers . / Park, Byoungjun; Cho, Kyoungah; Kim, Sangsig.
In: Applied Surface Science, Vol. 254, No. 23, 30.09.2008, p. 7905-7908.

Research output: Contribution to journal › Article › peer-review

Park, B, Cho, K & Kim, S 2008, ' Electrical characteristics of polycrystalline Si layers embedded into high-k Al ₂ O ₃ gate layers ', Applied Surface Science, vol. 254, no. 23, pp. 7905-7908. https://doi.org/10.1016/j.apsusc.2008.03.064

@article{a4e529eceef5487b9a1bc99fbc7f701a,

title = " Electrical characteristics of polycrystalline Si layers embedded into high-k Al 2 O 3 gate layers ",

abstract = " The electrical characteristics of polycrystalline Si (poly Si) layers embedded into high-k Al 2 O 3 (alumina) gate layers are investigated in this work. The capacitance versus voltage (C-V) curves obtained from the metal-alumina-polysilicon-alumina-silicon (MASAS) capacitors exhibit significant threshold voltage shifts, and the width of their hysteresis window is dependent on the range of the voltage sweep. The counterclockwise hysteresis observed in the C-V curves indicates that electrons originating from the p-type Si substrate in the inversion condition are trapped in the floating gate layer consisting of the poly Si layer present between the top and bottom Al 2 O 3 layers in the MASAS capacitor. Also, current versus voltage (I-V) measurements are performed to examine the electrical characteristics of the fabricated capacitors. The I-V measurements reveal that our MASAS capacitors show a very low leakage current density, compared to the previously reported results.",

keywords = "Alumina, High-k, Memory, Polycrystalline silicon",

author = "Byoungjun Park and Kyoungah Cho and Sangsig Kim",

year = "2008",

month = sep,

day = "30",

doi = "10.1016/j.apsusc.2008.03.064",

language = "English",

volume = "254",

pages = "7905--7908",

journal = "Applied Surface Science",

issn = "0169-4332",

publisher = "Elsevier B.V.",

number = "23",

}

TY - JOUR

T1 - Electrical characteristics of polycrystalline Si layers embedded into high-k Al 2 O 3 gate layers

AU - Park, Byoungjun

AU - Cho, Kyoungah

AU - Kim, Sangsig

PY - 2008/9/30

Y1 - 2008/9/30

N2 - The electrical characteristics of polycrystalline Si (poly Si) layers embedded into high-k Al 2 O 3 (alumina) gate layers are investigated in this work. The capacitance versus voltage (C-V) curves obtained from the metal-alumina-polysilicon-alumina-silicon (MASAS) capacitors exhibit significant threshold voltage shifts, and the width of their hysteresis window is dependent on the range of the voltage sweep. The counterclockwise hysteresis observed in the C-V curves indicates that electrons originating from the p-type Si substrate in the inversion condition are trapped in the floating gate layer consisting of the poly Si layer present between the top and bottom Al 2 O 3 layers in the MASAS capacitor. Also, current versus voltage (I-V) measurements are performed to examine the electrical characteristics of the fabricated capacitors. The I-V measurements reveal that our MASAS capacitors show a very low leakage current density, compared to the previously reported results.

AB - The electrical characteristics of polycrystalline Si (poly Si) layers embedded into high-k Al 2 O 3 (alumina) gate layers are investigated in this work. The capacitance versus voltage (C-V) curves obtained from the metal-alumina-polysilicon-alumina-silicon (MASAS) capacitors exhibit significant threshold voltage shifts, and the width of their hysteresis window is dependent on the range of the voltage sweep. The counterclockwise hysteresis observed in the C-V curves indicates that electrons originating from the p-type Si substrate in the inversion condition are trapped in the floating gate layer consisting of the poly Si layer present between the top and bottom Al 2 O 3 layers in the MASAS capacitor. Also, current versus voltage (I-V) measurements are performed to examine the electrical characteristics of the fabricated capacitors. The I-V measurements reveal that our MASAS capacitors show a very low leakage current density, compared to the previously reported results.

KW - Alumina

KW - High-k

KW - Memory

KW - Polycrystalline silicon

UR - http://www.scopus.com/inward/record.url?scp=51249092144&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=51249092144&partnerID=8YFLogxK

U2 - 10.1016/j.apsusc.2008.03.064

DO - 10.1016/j.apsusc.2008.03.064

M3 - Article

AN - SCOPUS:51249092144

SN - 0169-4332

VL - 254

SP - 7905

EP - 7908

JO - Applied Surface Science

JF - Applied Surface Science

IS - 23

ER -