Electrical properties of high density arrays of silicon nanowire field effect transistors

Hye Young Kim, Kangho Lee, Jae Woo Lee, Sangwook Kim, Gyu Tae Kim, Georg S. Duesberg

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9 Citations (Scopus)


Proximity effect corrected e-beam lithography of hydrogen silsesquioxane on silicon on insulator was used to fabricate multi-channel silicon nanowire field-effect transistors (SiNW FETs). Arrays of 15-channels with a line width of 18 nm and pitch as small as 50 nm, the smallest reported for electrically functional devices, were fabricated. These high density arrays were back-gated by the substrate and allowed for investigation of the effects of scaling on the electrical performance of this multi-channel SiNW FET. It was revealed that the drain current and the transconductance (gm) are both reduced with decreasing pitch size. The drain induced barrier lowering and the threshold voltage (Vth) are also decreased, whereas the subthreshold swing (S) is increased. The results are in agreement with our simulations of the electric potential profile of the devices. The study contains valuable information on SiNW FET integration and scaling for future devices.

Original languageEnglish
Article number144503
JournalJournal of Applied Physics
Issue number14
Publication statusPublished - 2013 Oct 14

Bibliographical note

Funding Information:
This work was supported by SFI under Contract Nos. 08/CE/I1432, PI_10/IN.1/I3030, and the National Research Foundation of Korea (NRF) funded by the Ministry of Education, Science and Technology (Converging Research Center Program, 2012K001313 and Global Frontier Research Program, No. 2011-0031638). We acknowledge the support of the Advanced Microscopy Lab.

ASJC Scopus subject areas

  • Physics and Astronomy(all)


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