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Energy-effective instruction fetch unit for embedded processors

  • Hong Kim Cheol
  • , Intae Hwang
  • , Changhyeon Chae
  • , Daewon Choi
  • , Taejin Jung
  • , Woo Chung Sung

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Abstract

    For energy-aware embedded and mobile processors, this paper proposes a new energy-effective design of the instruction fetch unit that exploits the fact that the peraccess energy consumption decreases as the cache size decreases.

    Original languageEnglish
    Title of host publication2008 5th IEEE Consumer Communications and Networking Conference, CCNC 2008
    Pages734-735
    Number of pages2
    DOIs
    Publication statusPublished - 2008
    Event2008 5th IEEE Consumer Communications and Networking Conference, CCNC 2008 - Las Vegas, NV, United States
    Duration: 2008 Jan 102008 Jan 12

    Publication series

    Name2008 5th IEEE Consumer Communications and Networking Conference, CCNC 2008

    Other

    Other2008 5th IEEE Consumer Communications and Networking Conference, CCNC 2008
    Country/TerritoryUnited States
    CityLas Vegas, NV
    Period08/1/1008/1/12

    UN SDGs

    This output contributes to the following UN Sustainable Development Goals (SDGs)

    1. SDG 7 - Affordable and Clean Energy
      SDG 7 Affordable and Clean Energy

    ASJC Scopus subject areas

    • Computer Networks and Communications
    • Software

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