Energy efficient hardware architecture of LU triangularization for MIMO receiver

Ji Woong Choi, Jungwon Lee, Byung Gueon Min, Jongsun Park

Research output: Contribution to journalArticlepeer-review

4 Citations (Scopus)


An energy-efficient hardware architecture of complex-valued matrix lower-upper (LU) triangularization for multi-inputmulti-output (MIMO) receivers is presented in this paper. In the LU triangularization process, Gaussian elimination operation is expressed as a series of vector-scalar products, where basic common computations can be precomputed and shared to reduce computational complexity. Our computation-sharing-based architecture was implemented using a 0.25-mu CMOS process, and the hardware can perform LU triangularization from 2×2 to 8×8 matrices. Numerical results show that the proposed architecture has considerable energy savings over conventional matrix triangularization schemes.

Original languageEnglish
Article number5545379
Pages (from-to)632-636
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Issue number8
Publication statusPublished - 2010 Aug


  • LU triangularization
  • Low-power very large scale integration (VLSI) design
  • matrix decomposition
  • multi-inputmulti-output (MIMO) demodulation

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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