Energy-efficient three-terminal SiOx memristor crossbar array enabled by vertical Si/graphene heterojunction barristor

Sanghyeon Choi, Jae Wan Choi, Jong Chan Kim, Hu Young Jeong, Jaeho Shin, Seonghoon Jang, Seonggil Ham, Nam Dong Kim, Gunuk Wang

Research output: Contribution to journalArticlepeer-review

24 Citations (Scopus)


A three-terminal memristor is an electronic memory architecture that is particularly suitable for next-generation devices owing to its customizable intrinsic switching characteristics. However, its slow switching speed and lack of high-density array structure has hindered its applicability thus far. In this study, we have designed and fabricated a novel architecture by vertically integrating a silicon oxide (SiOx) memristor and a graphene barristor, which can be readily extended to a 16 × 16 crossbar array. Notably, the unipolar resistive switching of the SiOx memristor can be actively modulated by controlling a silicon (Si) phase filament via the barristor's electrostatic gating. Such gate-tunable SiOx memristor in the array was observed to exhibit excellent electrical performance, e.g., increased switching speed (up to ~35 ns), increased switching probability, enhanced uniformity, and decreased operating voltage. The energy consumption is also significantly improved 4 nJ to 2 pJ via the gating, which exhibits lower than other three-terminal memristors. Moreover, it was able to sustain a high ON–OFF ratio (>106), multi-bit capability (~9 states), and stable endurance and retention properties regardless of gating. As an additional potential application, nonvolatile universal logic gates, including NOT, NOR, and NAND gates, were successfully implemented in this study based on simple circuits containing gate-tunable SiOx memristors. We believe that the proposed gate-tunable SiOx memristor represents a distinctive and novel development toward a fast, low energy, and extendable three-terminal memristor platform for electronic devices, thus undertaking a major step in unleashing the potential of memristors to support the growing demands of cutting-edge technologies.

Original languageEnglish
Article number105947
JournalNano Energy
Publication statusPublished - 2021 Jun

Bibliographical note

Funding Information:
This work was supported by the National Research Foundation of Korea ( NRF-2018R1A2B6008104 , NRF-2019R1A2C2003704 , NRF-2020M3F3A2A03082825 , NRF-2020R1A2C2014235 ), the KU-KIST Research Fund , a Korea University grant , and Samsung Electronics .

Publisher Copyright:
© 2021 Elsevier Ltd


  • Crossbar array
  • Electrostatic gating
  • Energy-efficient
  • Gate-tunable memristor
  • Graphene barristor
  • Nonvolatile universal logic gates
  • Silicon oxide (SiO)
  • Three-terminal memristor

ASJC Scopus subject areas

  • Renewable Energy, Sustainability and the Environment
  • General Materials Science
  • Electrical and Electronic Engineering


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