ESD protection circuit with an improved ESD capability for input or output circuit protection

Min Chul Jung; Sang Joon Hawng; Man Young Sung; Ey Goo Kang

doi:10.1109/MWSCAS.2005.1594139

ESD protection circuit with an improved ESD capability for input or output circuit protection

Min Chul Jung, Sang Joon Hawng, Man Young Sung, Ey Goo Kang

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

An ESD protection circuit in chip level protection is proposed as the electrostatic discharge (ESD) clamping circuit such as thick field oxide (TFO), grounded gate MOS (GGNMOS) and separated stages for input or output protection. The ESD protection circuits for input pad and output pad were implemented from the proposed ESD protection circuit. The realized protection circuits for input pad and output pad have been simulated by HSPICE and approved the improved ESD capability.

Original language	English
Title of host publication	2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005
Pages	468-471
Number of pages	4
DOIs	https://doi.org/10.1109/MWSCAS.2005.1594139
Publication status	Published - 2005
Event	2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005 - Cincinnati, OH, United States Duration: 2005 Aug 7 → 2005 Aug 10

Publication series

Name	Midwest Symposium on Circuits and Systems
Volume	2005
ISSN (Print)	1548-3746

Other

Other	2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005
Country/Territory	United States
City	Cincinnati, OH
Period	05/8/7 → 05/8/10

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Access to Document

10.1109/MWSCAS.2005.1594139

Cite this

Jung, M. C., Hawng, S. J., Sung, M. Y., & Kang, E. G. (2005). ESD protection circuit with an improved ESD capability for input or output circuit protection. In 2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005 (pp. 468-471). Article 1594139 (Midwest Symposium on Circuits and Systems; Vol. 2005). https://doi.org/10.1109/MWSCAS.2005.1594139

ESD protection circuit with an improved ESD capability for input or output circuit protection. / Jung, Min Chul; Hawng, Sang Joon; Sung, Man Young et al.
2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005. 2005. p. 468-471 1594139 (Midwest Symposium on Circuits and Systems; Vol. 2005).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Jung, MC, Hawng, SJ, Sung, MY & Kang, EG 2005, ESD protection circuit with an improved ESD capability for input or output circuit protection. in 2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005., 1594139, Midwest Symposium on Circuits and Systems, vol. 2005, pp. 468-471, 2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005, Cincinnati, OH, United States, 05/8/7. https://doi.org/10.1109/MWSCAS.2005.1594139

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abstract = "An ESD protection circuit in chip level protection is proposed as the electrostatic discharge (ESD) clamping circuit such as thick field oxide (TFO), grounded gate MOS (GGNMOS) and separated stages for input or output protection. The ESD protection circuits for input pad and output pad were implemented from the proposed ESD protection circuit. The realized protection circuits for input pad and output pad have been simulated by HSPICE and approved the improved ESD capability.",

author = "Jung, {Min Chul} and Hawng, {Sang Joon} and Sung, {Man Young} and Kang, {Ey Goo}",

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AU - Hawng, Sang Joon

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AU - Kang, Ey Goo

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N2 - An ESD protection circuit in chip level protection is proposed as the electrostatic discharge (ESD) clamping circuit such as thick field oxide (TFO), grounded gate MOS (GGNMOS) and separated stages for input or output protection. The ESD protection circuits for input pad and output pad were implemented from the proposed ESD protection circuit. The realized protection circuits for input pad and output pad have been simulated by HSPICE and approved the improved ESD capability.

AB - An ESD protection circuit in chip level protection is proposed as the electrostatic discharge (ESD) clamping circuit such as thick field oxide (TFO), grounded gate MOS (GGNMOS) and separated stages for input or output protection. The ESD protection circuits for input pad and output pad were implemented from the proposed ESD protection circuit. The realized protection circuits for input pad and output pad have been simulated by HSPICE and approved the improved ESD capability.

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BT - 2005 IEEE International 48th Midwest Symposium on Circuits and Systems, MWSCAS 2005

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Y2 - 7 August 2005 through 10 August 2005

ER -

ESD protection circuit with an improved ESD capability for input or output circuit protection

Abstract

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ASJC Scopus subject areas

Access to Document

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