ESD protection circuit with separated GGNMOS segment for input protection

Sang Joon Hwang; Chang Hun Lee; Min Chul Jung; Man Young Sung

doi:10.1109/EDSSC.2005.1635320

ESD protection circuit with separated GGNMOS segment for input protection

Sang Joon Hwang, Chang Hun Lee, Min Chul Jung, Man Young Sung

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Citations (Scopus)

Abstract

An ESD protection circuit in chip level protection is proposed as the electrostatic discharge (ESD) clamping circuit such as thick field oxide (TFO), grounded gate MOS (GGNMOS) and separated segment for input protection. The ESD protection circuit for input protection was implemented from the proposed ESD protection circuit. The GGNMOS applied to separated segment has been simulated by DESSIS of TCAD for thermal characteristic with human body model (HBM) pulse and realized the protection circuit for input protection has been simulated by HSPICE.

Original language	English
Title of host publication	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	511-514
Number of pages	4
ISBN (Print)	0780393392, 9780780393394
DOIs	https://doi.org/10.1109/EDSSC.2005.1635320
Publication status	Published - 2005
Event	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC - Howloon, Hong Kong Duration: 2005 Dec 19 → 2005 Dec 21

Publication series

Name	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC

Other

Other	2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC
Country/Territory	Hong Kong
City	Howloon
Period	05/12/19 → 05/12/21

ASJC Scopus subject areas

Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

Access to Document

10.1109/EDSSC.2005.1635320

Cite this

Hwang, S. J., Lee, C. H., Jung, M. C., & Sung, M. Y. (2005). ESD protection circuit with separated GGNMOS segment for input protection. In 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC (pp. 511-514). Article 1635320 (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDSSC.2005.1635320

ESD protection circuit with separated GGNMOS segment for input protection. / Hwang, Sang Joon; Lee, Chang Hun; Jung, Min Chul et al.
2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC. Institute of Electrical and Electronics Engineers Inc., 2005. p. 511-514 1635320 (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Hwang, SJ, Lee, CH, Jung, MC & Sung, MY 2005, ESD protection circuit with separated GGNMOS segment for input protection. in 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC., 1635320, 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC, Institute of Electrical and Electronics Engineers Inc., pp. 511-514, 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC, Howloon, Hong Kong, 05/12/19. https://doi.org/10.1109/EDSSC.2005.1635320

Hwang SJ, Lee CH, Jung MC, Sung MY. ESD protection circuit with separated GGNMOS segment for input protection. In 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC. Institute of Electrical and Electronics Engineers Inc. 2005. p. 511-514. 1635320. (2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC). doi: 10.1109/EDSSC.2005.1635320

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abstract = "An ESD protection circuit in chip level protection is proposed as the electrostatic discharge (ESD) clamping circuit such as thick field oxide (TFO), grounded gate MOS (GGNMOS) and separated segment for input protection. The ESD protection circuit for input protection was implemented from the proposed ESD protection circuit. The GGNMOS applied to separated segment has been simulated by DESSIS of TCAD for thermal characteristic with human body model (HBM) pulse and realized the protection circuit for input protection has been simulated by HSPICE.",

author = "Hwang, {Sang Joon} and Lee, {Chang Hun} and Jung, {Min Chul} and Sung, {Man Young}",

year = "2005",

doi = "10.1109/EDSSC.2005.1635320",

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series = "2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC",

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AU - Sung, Man Young

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N2 - An ESD protection circuit in chip level protection is proposed as the electrostatic discharge (ESD) clamping circuit such as thick field oxide (TFO), grounded gate MOS (GGNMOS) and separated segment for input protection. The ESD protection circuit for input protection was implemented from the proposed ESD protection circuit. The GGNMOS applied to separated segment has been simulated by DESSIS of TCAD for thermal characteristic with human body model (HBM) pulse and realized the protection circuit for input protection has been simulated by HSPICE.

AB - An ESD protection circuit in chip level protection is proposed as the electrostatic discharge (ESD) clamping circuit such as thick field oxide (TFO), grounded gate MOS (GGNMOS) and separated segment for input protection. The ESD protection circuit for input protection was implemented from the proposed ESD protection circuit. The GGNMOS applied to separated segment has been simulated by DESSIS of TCAD for thermal characteristic with human body model (HBM) pulse and realized the protection circuit for input protection has been simulated by HSPICE.

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M3 - Conference contribution

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T3 - 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC

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BT - 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC

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ER -

ESD protection circuit with separated GGNMOS segment for input protection

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