Evaluating coherence-exploiting hardware Trojan

Minsu Kim, Sunhee Kong, Boeui Hong, Lei Xu, Weidong Shi, Taeweon Suh

Research output: Chapter in Book/Report/Conference proceedingConference contribution

10 Citations (Scopus)

Abstract

Increasing complexity of integrated circuits and IP-based hardware designs have created the risk of hardware Trojans. This paper introduces a new type of threat, a coherence-exploiting hardware Trojan. This Trojan can be maliciously implanted in master components in a system, and continuously injects memory transactions onto the main interconnect. The injected traffic forces the eviction of cache lines, taking advantage of cache coherence protocols. This type of Trojans insidiously slows down the system performance, incurring Denial-of-Service (DoS) attack. We used a Xilinx Zynq-7000 device to implement the Trojan and evaluate its severity. Experiments revealed that the system performance can be severely degraded as much as 258% with the Trojan. A countermeasure to annihilate the Trojan attack is proposed in detail. We also found that AXI version 3.0 supports a seemingly irrelevant invalidation protocol through ACP, opening a door for the potential Trojan attack.

Original languageEnglish
Title of host publicationProceedings of the 2017 Design, Automation and Test in Europe, DATE 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages157-162
Number of pages6
ISBN (Electronic)9783981537093
DOIs
Publication statusPublished - 2017 May 11
Event20th Design, Automation and Test in Europe, DATE 2017 - Swisstech, Lausanne, Switzerland
Duration: 2017 Mar 272017 Mar 31

Publication series

NameProceedings of the 2017 Design, Automation and Test in Europe, DATE 2017

Other

Other20th Design, Automation and Test in Europe, DATE 2017
Country/TerritorySwitzerland
CitySwisstech, Lausanne
Period17/3/2717/3/31

Keywords

  • AXI protocol
  • Cache coherence
  • DoS attack
  • Hardware Trojan
  • Zynq-7000

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Safety, Risk, Reliability and Quality

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