@inproceedings{e2b6caeff5db45368fa1a9e0b2c30ff4,
title = "Exploiting narrow-width values for process variation-tolerant 3-D microprocessors",
abstract = "Process variation is a challenging problem in 3D microprocessors, since it adversely affects performance, power, and reliability of 3D microprocessors, which in turn results in yield losses. In this paper, we propose a novel architectural scheme that exploits the narrow-width value for yield improvement of last-level caches in 3D microprocessors. In a energy-/performance-efficient manner, our proposed scheme improves cache yield by 58.7% and 17.3% compared to the baseline and the na{\"i}ve way-reduction scheme (that simply discards faulty cache lines), respectively.",
keywords = "3D microprocessor, last-level cache, narrow-width value, process variation, yield",
author = "Joonho Kong and Chung, {Sung Woo}",
year = "2012",
doi = "10.1145/2228360.2228581",
language = "English",
isbn = "9781450311991",
series = "Proceedings - Design Automation Conference",
pages = "1197--1206",
booktitle = "Proceedings of the 49th Annual Design Automation Conference, DAC '12",
note = "49th Annual Design Automation Conference, DAC '12 ; Conference date: 03-06-2012 Through 07-06-2012",
}