Fermi-Level Unpinning Using a Ge-Passivated Metal-Interlayer-Semiconductor Structure for Non-Alloyed Ohmic Contact of High-Electron-Mobility Transistors

Seung Hwan Kim; Gwang Sik Kim; Jeong Kyu Kim; Jin Hong Park; Changhwan Shin; Changhwan Choi; Hyun Yong Yu

doi:10.1109/LED.2015.2453479

Fermi-Level Unpinning Using a Ge-Passivated Metal-Interlayer-Semiconductor Structure for Non-Alloyed Ohmic Contact of High-Electron-Mobility Transistors

Seung Hwan Kim, Gwang Sik Kim, Jeong Kyu Kim, Jin Hong Park, Changhwan Shin, Changhwan Choi, Hyun Yong Yu

School of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

15 Citations (Scopus)

Abstract

We demonstrate the use of germanium passivation in conjunction with a ZnO interlayer in a metal-interlayer-semiconductor structure in a source/drain (S/D) contact. The Fermi-level pinning problem resulting in the large contact resistances in S/D contacts is effectively alleviated by inserting a thin Ge passivation layer and a ZnO interlayer, passivating the GaAs surface and reducing the metal-induced gap states on the GaAs surface, respectively. The specific contact resistivity for the Ti/ZnO/Ge/n-GaAs (~2 × 10¹⁸ cm^-3) structure exhibits a ~1660× reduction compared with that of a Ti/n-GaAs structure. These results suggest that the proposed structure shows promise as a nonalloyed ohmic contact in high-electron-mobility transistors.

Original language	English
Article number	7151781
Pages (from-to)	884-886
Number of pages	3
Journal	IEEE Electron Device Letters
Volume	36
Issue number	9
DOIs	https://doi.org/10.1109/LED.2015.2453479
Publication status	Published - 2015 Sept 1

Bibliographical note

Publisher Copyright:
© 1980-2012 IEEE.

Keywords

Fermi level unpinning
Specific contact resistivity
gallium arsenide

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/LED.2015.2453479

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title = "Fermi-Level Unpinning Using a Ge-Passivated Metal-Interlayer-Semiconductor Structure for Non-Alloyed Ohmic Contact of High-Electron-Mobility Transistors",

abstract = "We demonstrate the use of germanium passivation in conjunction with a ZnO interlayer in a metal-interlayer-semiconductor structure in a source/drain (S/D) contact. The Fermi-level pinning problem resulting in the large contact resistances in S/D contacts is effectively alleviated by inserting a thin Ge passivation layer and a ZnO interlayer, passivating the GaAs surface and reducing the metal-induced gap states on the GaAs surface, respectively. The specific contact resistivity for the Ti/ZnO/Ge/n-GaAs (\textasciitilde{}2 × 1018 cm-3) structure exhibits a \textasciitilde{}1660× reduction compared with that of a Ti/n-GaAs structure. These results suggest that the proposed structure shows promise as a nonalloyed ohmic contact in high-electron-mobility transistors.",

keywords = "Fermi level unpinning, Specific contact resistivity, gallium arsenide",

author = "Kim, \{Seung Hwan\} and Kim, \{Gwang Sik\} and Kim, \{Jeong Kyu\} and Park, \{Jin Hong\} and Changhwan Shin and Changhwan Choi and Yu, \{Hyun Yong\}",

note = "Publisher Copyright: {\textcopyright} 1980-2012 IEEE.",

year = "2015",

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doi = "10.1109/LED.2015.2453479",

language = "English",

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T1 - Fermi-Level Unpinning Using a Ge-Passivated Metal-Interlayer-Semiconductor Structure for Non-Alloyed Ohmic Contact of High-Electron-Mobility Transistors

AU - Kim, Seung Hwan

AU - Kim, Gwang Sik

AU - Kim, Jeong Kyu

AU - Park, Jin Hong

AU - Shin, Changhwan

AU - Choi, Changhwan

AU - Yu, Hyun Yong

PY - 2015/9/1

Y1 - 2015/9/1

N2 - We demonstrate the use of germanium passivation in conjunction with a ZnO interlayer in a metal-interlayer-semiconductor structure in a source/drain (S/D) contact. The Fermi-level pinning problem resulting in the large contact resistances in S/D contacts is effectively alleviated by inserting a thin Ge passivation layer and a ZnO interlayer, passivating the GaAs surface and reducing the metal-induced gap states on the GaAs surface, respectively. The specific contact resistivity for the Ti/ZnO/Ge/n-GaAs (~2 × 1018 cm-3) structure exhibits a ~1660× reduction compared with that of a Ti/n-GaAs structure. These results suggest that the proposed structure shows promise as a nonalloyed ohmic contact in high-electron-mobility transistors.

AB - We demonstrate the use of germanium passivation in conjunction with a ZnO interlayer in a metal-interlayer-semiconductor structure in a source/drain (S/D) contact. The Fermi-level pinning problem resulting in the large contact resistances in S/D contacts is effectively alleviated by inserting a thin Ge passivation layer and a ZnO interlayer, passivating the GaAs surface and reducing the metal-induced gap states on the GaAs surface, respectively. The specific contact resistivity for the Ti/ZnO/Ge/n-GaAs (~2 × 1018 cm-3) structure exhibits a ~1660× reduction compared with that of a Ti/n-GaAs structure. These results suggest that the proposed structure shows promise as a nonalloyed ohmic contact in high-electron-mobility transistors.

KW - Fermi level unpinning

KW - Specific contact resistivity

KW - gallium arsenide

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DO - 10.1109/LED.2015.2453479

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SP - 884

EP - 886

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

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M1 - 7151781

ER -

Fermi-Level Unpinning Using a Ge-Passivated Metal-Interlayer-Semiconductor Structure for Non-Alloyed Ohmic Contact of High-Electron-Mobility Transistors

Abstract

Bibliographical note

Keywords

ASJC Scopus subject areas

Access to Document

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