Formation of low-resistivity metal/germanium contact with ultra-thin interlayer and plasma oxidation for n-channel germanium FET

Gwang Sik Kim, Seung Hwan Kim, June Park, Sun Woo Kim, Hyun Yong Yu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this work, the plasma oxidation process is introduced into the metal-interlayer-semiconductor (M-I-S) structure to reduce the contact resistance of the metal/n-type germanium (n-Ge) contact. The GeOx layer formed by the plasma oxidation process acts as a good passivation layer between TiO2 and Ge, and also an additional metal induced gap states (MIGS) blocking layer. From these effects of the GeOx layer, the M-I-S structure with multilayered interlayer stack, TiO2/GeOx, shows approximately four orders of magnitude of the reverse current density improvement from the M-S contact. This technique can be a solution of the severe Fermi-level pinning (FLP) and the high contact resistance in source/drain (S/D) regions of the n-channel germanium field-effect transistor (FET).

Original languageEnglish
Title of host publicationSilicon Compatible Materials, Processes, and Technologies for Advanced Integrated Circuits and Emerging Applications 6
EditorsF. Roozeboom, V. Narayanan, K. Kakushima, P. J. Timans, E. P. Gusev, Z. Karim, S. De Gendt
PublisherElectrochemical Society Inc.
Pages127-129
Number of pages3
Edition4
ISBN (Electronic)9781607687146
DOIs
Publication statusPublished - 2016
EventSymposium on Silicon Compatible Materials, Processes, and Technologies for Advanced Integrated Circuits and Emerging Applications 6 - 229th ECS Meeting - San Diego, United States
Duration: 2016 May 292016 Jun 2

Publication series

NameECS Transactions
Number4
Volume72
ISSN (Print)1938-6737
ISSN (Electronic)1938-5862

Other

OtherSymposium on Silicon Compatible Materials, Processes, and Technologies for Advanced Integrated Circuits and Emerging Applications 6 - 229th ECS Meeting
Country/TerritoryUnited States
CitySan Diego
Period16/5/2916/6/2

Bibliographical note

Funding Information:
This research was supported by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT, and Future Planning (Grant 2014R1A1A1036090), the Technology Innovation Program (10048594, Technology Development of Ge nMOS/pMOS FinFET for 10nm Technology Node) funded by the Ministry of Trade, Industry and Energy (MI Korea).

Publisher Copyright:
©The Electrochemical Society.

ASJC Scopus subject areas

  • General Engineering

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