Abstract
Most implementations of accumulators, multipliers, or multiplier-accumulator units, operating in a finite integer ring, R{m), are based on ROM's or PLA's. This paper proposes a full adder-based arithmetic unit, called an (FA)-based AUm, capable of performing both addition and general multiplication at the same time, in R(m). For all moduli, FA-based AUm's are shown to execute much faster and have much less hardware complexity and smaller time-complexity products than ROM-based AUm's. For large values of m, they are also shown to be less complex and have smaller time-complexity products than ROM-based units, which are capable of performing multiplication only by a constant. Since the proposed units use full adders as the basic building block, they result in easy-to-design, modular, and regular VLSI implementations.
Original language | English |
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Pages (from-to) | 740-745 |
Number of pages | 6 |
Journal | IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing |
Volume | 40 |
Issue number | 11 |
DOIs | |
Publication status | Published - 1993 Nov |
Externally published | Yes |
ASJC Scopus subject areas
- Signal Processing
- Electrical and Electronic Engineering