Abstract
We present a systematic analysis technique of complementary metal-oxide-semiconductor (CMOS) radio-frequency (RF) integrated circuits (IC's). A full simulation program with integrated circuit emphasis (SPICE) simulation of the whole chip including the package and the die, with the parameters extracted from purely software analysis, has been performed. It is shown that the RF impedance matching without S-parameter based techniques is possible and the measured results agree well with our SPICE-only software based technique.
Original language | English |
---|---|
Pages (from-to) | 183-189 |
Number of pages | 7 |
Journal | IEEE Transactions on Components and Packaging Technologies |
Volume | 23 |
Issue number | 1 |
DOIs | |
Publication status | Published - 2000 |
Bibliographical note
Funding Information:Manuscript received November 1, 1999; revised December 22, 1999. This paper was recommended for publication by Associate Editor A. Deutsch upon evaluation of the reviewers’ comments. This work was supported by the Korea Research Foundation. K. H. Kim, S. W. Hwang, J.-W. Park, and S.-W. Kim are with the Department of Electronics Engineering, Korea University, Seoul 136-701, Korea. H. J. Chung and S. H. Yoon are with the Samsung Electronics Corporation, Kyungkido 449-711, Korea. J. Choi and D. Ahn are with the Department of Electronics Engineering, University of Seoul, Seoul 130-020, Korea. Publisher Item Identifier S 1521-3331(00)02688-X.
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering