Abstract
The feasibility of full split C-V method in ultra-thin body and BOX (UTBB) FDSOI devices is demonstrated, emphasizing the usefulness of gate-to-bulk capacitance. The split C-V measurements carried out on both gate-to-channel and gate-to-bulk mode are shown to be consistent with TCAD simulation. This enabled us to propose an improved parameter extraction methodology for the whole vertical FDSOI stack from gate to substrate using back biasing effect.
Original language | English |
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Pages (from-to) | 104-107 |
Number of pages | 4 |
Journal | Solid-State Electronics |
Volume | 99 |
DOIs | |
Publication status | Published - 2014 Sept |
Keywords
- MOS
- SOI
- Split CV
- UTBB
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering
- Materials Chemistry