Hi-End: Hierarchical, Endurance-Aware STT-MRAM-Based Register File for Energy-Efficient GPUs

Won Jeon, Jun Hyun Park, Yoonsoo Kim, Gunjae Koo, Won Woo Ro

Research output: Contribution to journalArticlepeer-review

9 Citations (Scopus)


Modern Graphics Processing Units (GPUs) require large hardware resources for massive parallel thread executions. In particular, modern GPUs have a large register file composed of Static Random Access Memory (SRAM). Due to the high leakage current of SRAM, the register file consumes approximately 20% of the total GPU energy. The energy efficiency of the register file becomes more critical as the throughput of GPUs increases. For more energy-efficient GPUs, the usage of non-volatile memory such as Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM) as the GPU register file has been studied extensively. STT-MRAM requires a lower leakage current compared to SRAM and provides an appropriate read performance. However, using STT-MRAM directly in the GPU register file causes problems in performance and endurance because of complicated write procedures and material characteristics. To overcome these challenges, we propose a novel register file architecture and its management system for GPUs, named Hi-End, which exploits the data locality and compressibility of the register file. For STT-MRAM-based GPU register files, Hi-End increases the data write performance and endurance by caching and data compression, respectively. In our evaluation, Hi-End enhances the energy efficiency of a GPU register file by 70.02% and reduces the write operations by up to 95.98% with negligible performance degradation compared to SRAM-based register files.

Original languageEnglish
Article number9139253
Pages (from-to)127768-127780
Number of pages13
JournalIEEE Access
Publication statusPublished - 2020

Bibliographical note

Funding Information:
This work was supported in part by the National Research Foundation of Korea (NRF) funded by the Korea Government (MSIT) under Grant NRF-2018R1A2A2A05018941, and in part by the Institute of Information and Communication Technology Planning and Evaluation (IITP) funded by the Korea Government (MSIT) under Grant 2019-0-00533, Research on CPU vulnerability detection and validation.

Publisher Copyright:
© 2013 IEEE.


  • Graphics processing unit
  • chip area
  • data compression
  • endurance
  • energy efficiency
  • register file
  • spin-transfer torque magnetic random access memory

ASJC Scopus subject areas

  • General Computer Science
  • General Materials Science
  • General Engineering


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