High-performance FIR filter design based on sharing multiplication

Jongsun Park; Khurram Muhammad; Kaushik Roy

doi:10.1109/TVLSI.2002.800529

High-performance FIR filter design based on sharing multiplication

Jongsun Park, Khurram Muhammad, Kaushik Roy

Research output: Contribution to journal › Article › peer-review

31 Citations (Scopus)

Abstract

Finite impulse response (FIR) filtering can be expressed as multiplications of vectors by scalars. We present high-speed designs for FIR filters based on a computation sharing multiplier which specifically targets computation re-use in vector-scalar products. The performance of the proposed implementation is compared with implementations based on carry-save and Wallace tree multipliers in 0.35-μm technology. We show that sharing multiplier scheme improves speed by approximately 52 and 33% with respect to the FIR filter implementations based on the carry-save multiplier and Wallace tree multiplier, respectively. In addition, sharing multiplier scheme has a relatively small power delay product than other multiplier schemes. Using voltage scaling, power consumption of the FIR filter based on computation sharing multiplier can be reduced to 41% of the FIR filter based on the Wallace tree multiplier for the same frequency of operation.

Original language	English
Pages (from-to)	244-253
Number of pages	10
Journal	IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume	11
Issue number	2
DOIs	https://doi.org/10.1109/TVLSI.2002.800529
Publication status	Published - 2003 Apr
Externally published	Yes

Bibliographical note

Funding Information:
Manuscript received July 27, 2000; revised March 26, 2001. This work was supported in part by Rockwell Corporation and by AT&T/Lucent Foundation. J. Park and K. Roy are with the School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907 USA (e-mail: jongsun@ecn.purdue.edu; kaushik@ecn.purdue.edu). K. Muhammad is with Texas Instruments Inc., Dallas, TX 75243 USA (e-mail: khurram@msp.sc.ti.com). Digital Object Identifier 10.1109/TVLSI.2002.800529

Keywords

Computation sharing
Computation sharing multiplier
High-performance finite impulse response (FIR) filter

ASJC Scopus subject areas

Software
Hardware and Architecture
Electrical and Electronic Engineering

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10.1109/TVLSI.2002.800529

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@article{163132aee1ee4c6092edd56b2496c633,

title = "High-performance FIR filter design based on sharing multiplication",

abstract = "Finite impulse response (FIR) filtering can be expressed as multiplications of vectors by scalars. We present high-speed designs for FIR filters based on a computation sharing multiplier which specifically targets computation re-use in vector-scalar products. The performance of the proposed implementation is compared with implementations based on carry-save and Wallace tree multipliers in 0.35-μm technology. We show that sharing multiplier scheme improves speed by approximately 52 and 33% with respect to the FIR filter implementations based on the carry-save multiplier and Wallace tree multiplier, respectively. In addition, sharing multiplier scheme has a relatively small power delay product than other multiplier schemes. Using voltage scaling, power consumption of the FIR filter based on computation sharing multiplier can be reduced to 41% of the FIR filter based on the Wallace tree multiplier for the same frequency of operation.",

keywords = "Computation sharing, Computation sharing multiplier, High-performance finite impulse response (FIR) filter",

author = "Jongsun Park and Khurram Muhammad and Kaushik Roy",

note = "Funding Information: Manuscript received July 27, 2000; revised March 26, 2001. This work was supported in part by Rockwell Corporation and by AT&T/Lucent Foundation. J. Park and K. Roy are with the School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907 USA (e-mail: jongsun@ecn.purdue.edu; kaushik@ecn.purdue.edu). K. Muhammad is with Texas Instruments Inc., Dallas, TX 75243 USA (e-mail: khurram@msp.sc.ti.com). Digital Object Identifier 10.1109/TVLSI.2002.800529",

year = "2003",

month = apr,

doi = "10.1109/TVLSI.2002.800529",

language = "English",

volume = "11",

pages = "244--253",

journal = "IEEE Transactions on Very Large Scale Integration (VLSI) Systems",

issn = "1063-8210",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "2",

}

TY - JOUR

T1 - High-performance FIR filter design based on sharing multiplication

AU - Park, Jongsun

AU - Muhammad, Khurram

AU - Roy, Kaushik

N1 - Funding Information: Manuscript received July 27, 2000; revised March 26, 2001. This work was supported in part by Rockwell Corporation and by AT&T/Lucent Foundation. J. Park and K. Roy are with the School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907 USA (e-mail: jongsun@ecn.purdue.edu; kaushik@ecn.purdue.edu). K. Muhammad is with Texas Instruments Inc., Dallas, TX 75243 USA (e-mail: khurram@msp.sc.ti.com). Digital Object Identifier 10.1109/TVLSI.2002.800529

PY - 2003/4

Y1 - 2003/4

N2 - Finite impulse response (FIR) filtering can be expressed as multiplications of vectors by scalars. We present high-speed designs for FIR filters based on a computation sharing multiplier which specifically targets computation re-use in vector-scalar products. The performance of the proposed implementation is compared with implementations based on carry-save and Wallace tree multipliers in 0.35-μm technology. We show that sharing multiplier scheme improves speed by approximately 52 and 33% with respect to the FIR filter implementations based on the carry-save multiplier and Wallace tree multiplier, respectively. In addition, sharing multiplier scheme has a relatively small power delay product than other multiplier schemes. Using voltage scaling, power consumption of the FIR filter based on computation sharing multiplier can be reduced to 41% of the FIR filter based on the Wallace tree multiplier for the same frequency of operation.

AB - Finite impulse response (FIR) filtering can be expressed as multiplications of vectors by scalars. We present high-speed designs for FIR filters based on a computation sharing multiplier which specifically targets computation re-use in vector-scalar products. The performance of the proposed implementation is compared with implementations based on carry-save and Wallace tree multipliers in 0.35-μm technology. We show that sharing multiplier scheme improves speed by approximately 52 and 33% with respect to the FIR filter implementations based on the carry-save multiplier and Wallace tree multiplier, respectively. In addition, sharing multiplier scheme has a relatively small power delay product than other multiplier schemes. Using voltage scaling, power consumption of the FIR filter based on computation sharing multiplier can be reduced to 41% of the FIR filter based on the Wallace tree multiplier for the same frequency of operation.

KW - Computation sharing

KW - Computation sharing multiplier

KW - High-performance finite impulse response (FIR) filter

UR - http://www.scopus.com/inward/record.url?scp=0041767583&partnerID=8YFLogxK

U2 - 10.1109/TVLSI.2002.800529

DO - 10.1109/TVLSI.2002.800529

M3 - Article

AN - SCOPUS:0041767583

SN - 1063-8210

VL - 11

SP - 244

EP - 253

JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems

JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems

IS - 2

ER -

High-performance FIR filter design based on sharing multiplication

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Keywords

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