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Hybrid CMOS-Memristor synapse circuits for implementing Ca ion-based plasticity model

  • Jae Gwang Lim
  • , Sung Jae Park
  • , Sang Min Lee
  • , Yeonjoo Jeong
  • , Jaewook Kim
  • , Suyoun Lee
  • , Jongkil Park
  • , Gyu Weon Hwang
  • , Kyeong Seok Lee
  • , Seongsik Park
  • , Hyun Jae Jang
  • , Byeong Kwon Ju
  • , Jong Keuk Park*
  • , Inho Kim*
  • *Corresponding author for this work

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