Impact of Random Dopant Fluctuation on n-Type Ge Junctionless FinFETs with Metal-Interlayer-Semiconductor Source/Drain Contact Structure

Seung Geun Jung, Hyun Yong Yu

Research output: Contribution to journalArticlepeer-review

2 Citations (Scopus)

Abstract

The impact of random dopant fluctuation (RDF) on n-type Ge junctionless FinFETs (JLFETs) with metal-interlayer-semiconductor (MIS) source/drain (S/D) contact structure is firstly investigated via 3-D technology computer aided design (TCAD) simulations. The estimation and evaluation of standard deviations in threshold voltage (Vth), on-state current (Ion), off-state current (Ioff), subthreshold swing (SS), and drain induced barrier lowering (DIBL) by different Ge nanowire doping concentrations and different heights for RDF effects are performed. The results show a decreasing trend of RDF with lower doping concentration of the device. Furthermore, the influence of MIS S/D on RDF of n-type Ge JLFET is assessed through a comparative analysis between an n-type Ge JLFETs with and without MIS S/D structure. The analysis results estimate that MIS S/D can reduce performance variation to approximately 0.0237 V for σ Vth, 5.75 × 10-5 A/μm for σ Ion, 4.30 × 10-10 A/μm for σ Ioff, 0.548 mV/dec for σ SS, and 12.3 mV/V for DIBL, without severe performance degradation of the current nominal values. This estimation gives a significant insight on variability prediction of the 7 nm n-type Ge JLFET device with MIS S/D structure.

Original languageEnglish
Article number8883266
Pages (from-to)1119-1124
Number of pages6
JournalIEEE Journal of the Electron Devices Society
Volume7
DOIs
Publication statusPublished - 2019

Bibliographical note

Funding Information:
This work was supported in part by the Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT, and Future Planning under Grant 2017R1A2B4006460, in part by the Nano Material Technology Development Program through NRF funded by the Ministry of Science, ICT and Future Planning under Grant 2015M3A7B7045490, in part by the Ministry of Trade, Industry & Energy, under Project 20003551, and in part by the Korea Semiconductor Research Consortium Support Program for the Development of the Future Semiconductor Device.

Publisher Copyright:
© 2013 IEEE.

Keywords

  • 3-D TCAD
  • Junctionless FET
  • germanium
  • line-edge roughness (LER)
  • metal-inter layer-semiconductor source/drain
  • random dopant fluctuation (RDF)

ASJC Scopus subject areas

  • Biotechnology
  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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