Improved vein pattern extracting algorithm and its implementation

Sang Kyun Im; Hyung Man Park; Soo Won Kim; Chang Kyung Chung; Hwan Soo Choi

doi:10.1109/ICCE.2000.854470

Improved vein pattern extracting algorithm and its implementation

Sang Kyun Im, Hyung Man Park, Soo Won Kim, Chang Kyung Chung, Hwan Soo Choi

* Honorary professors

Research output: Contribution to journal › Article › peer-review

46 Citations (Scopus)

Abstract

This paper proposes an improved vein pattern extracting algorithm which compensates the loss of vein patterns in the edge area, gives more enhanced and stabilized vein pattern information, and shows better performance than the existing algorithm. Also, the problem arising from the iterative nature of filtering preprocess in the existing algorithm is solved by designing a filter that is processed only one time so that fast recognition speed and reduced hardware complexity is obtained. The proposed algorithm is implemented with a FPGA(Field Programmable Gate Array) device and the FAR(False Acceptance Rate) shows five times better than the existing algorithm and the recognition speed is measured to be 100[ms/person].

Original language	English
Pages (from-to)	2-3
Number of pages	2
Journal	Digest of Technical Papers - IEEE International Conference on Consumer Electronics
DOIs	https://doi.org/10.1109/ICCE.2000.854470
Publication status	Published - 2000

ASJC Scopus subject areas

Industrial and Manufacturing Engineering
Electrical and Electronic Engineering

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10.1109/ICCE.2000.854470

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author = "Im, {Sang Kyun} and Park, {Hyung Man} and Kim, {Soo Won} and Chung, {Chang Kyung} and Choi, {Hwan Soo}",

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AU - Chung, Chang Kyung

AU - Choi, Hwan Soo

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Y1 - 2000

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AB - This paper proposes an improved vein pattern extracting algorithm which compensates the loss of vein patterns in the edge area, gives more enhanced and stabilized vein pattern information, and shows better performance than the existing algorithm. Also, the problem arising from the iterative nature of filtering preprocess in the existing algorithm is solved by designing a filter that is processed only one time so that fast recognition speed and reduced hardware complexity is obtained. The proposed algorithm is implemented with a FPGA(Field Programmable Gate Array) device and the FAR(False Acceptance Rate) shows five times better than the existing algorithm and the recognition speed is measured to be 100[ms/person].

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JO - Digest of Technical Papers - IEEE International Conference on Consumer Electronics

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ER -

Improved vein pattern extracting algorithm and its implementation

Abstract

ASJC Scopus subject areas

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