Improving the system-on-a-chip performance for mobile systems by using efficient bus interface

Na Ra Yang; Jeonghwan Lee; Intae Hwang; Cheol Kim Hong; Yoon Gilsang; Sung Woo Chung; Jong Myon Kim

doi:10.1109/CMC.2009.297

Improving the system-on-a-chip performance for mobile systems by using efficient bus interface

Na Ra Yang, Jeonghwan Lee, Intae Hwang, Cheol Kim Hong, Yoon Gilsang, Sung Woo Chung, Jong Myon Kim

Department of Computer Science and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Citations (Scopus)

Abstract

Minimizing the communication delay is one of the most important design considerations in System-on-a-Chip (SoC) design for mobile systems. In this paper, we present a bus interface design technique, called Efficient Bus Interface (EBI), to reduce the communication delay between the Intellectual Property (IP) core and the memory connected through AMBA3 AXI bus for mobile systems. Several mobile systems require huge multimedia data in the memory to be transferred to the IP core through bus. The proposed EBI is designed to reduce the memory access time by using double buffering, open row access, and bank interleaving. According to our simulations, the proposed EBI improves the performance of the target system by up to 51%.

Original language	English
Title of host publication	Proceedings - 2009 WRI International Conference on Communications and Mobile Computing, CMC 2009
Pages	606-608
Number of pages	3
DOIs	https://doi.org/10.1109/CMC.2009.297
Publication status	Published - 2009
Event	2009 WRI International Conference on Communications and Mobile Computing, CMC 2009 - Kunming, Yunnan, China Duration: 2009 Jan 6 → 2009 Jan 8

Publication series

Name	Proceedings - 2009 WRI International Conference on Communications and Mobile Computing, CMC 2009
Volume	2

Other

Other	2009 WRI International Conference on Communications and Mobile Computing, CMC 2009
Country/Territory	China
City	Kunming, Yunnan
Period	09/1/6 → 09/1/8

ASJC Scopus subject areas

Computer Networks and Communications
Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/CMC.2009.297

Cite this

Yang, N. R., Lee, J., Hwang, I., Hong, C. K., Gilsang, Y., Chung, S. W., & Kim, J. M. (2009). Improving the system-on-a-chip performance for mobile systems by using efficient bus interface. In Proceedings - 2009 WRI International Conference on Communications and Mobile Computing, CMC 2009 (pp. 606-608). [4797195] (Proceedings - 2009 WRI International Conference on Communications and Mobile Computing, CMC 2009; Vol. 2). https://doi.org/10.1109/CMC.2009.297

Improving the system-on-a-chip performance for mobile systems by using efficient bus interface. / Yang, Na Ra; Lee, Jeonghwan; Hwang, Intae et al.
Proceedings - 2009 WRI International Conference on Communications and Mobile Computing, CMC 2009. 2009. p. 606-608 4797195 (Proceedings - 2009 WRI International Conference on Communications and Mobile Computing, CMC 2009; Vol. 2).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Yang, NR, Lee, J, Hwang, I, Hong, CK, Gilsang, Y, Chung, SW & Kim, JM 2009, Improving the system-on-a-chip performance for mobile systems by using efficient bus interface. in Proceedings - 2009 WRI International Conference on Communications and Mobile Computing, CMC 2009., 4797195, Proceedings - 2009 WRI International Conference on Communications and Mobile Computing, CMC 2009, vol. 2, pp. 606-608, 2009 WRI International Conference on Communications and Mobile Computing, CMC 2009, Kunming, Yunnan, China, 09/1/6. https://doi.org/10.1109/CMC.2009.297

Yang NR, Lee J, Hwang I, Hong CK, Gilsang Y, Chung SW et al. Improving the system-on-a-chip performance for mobile systems by using efficient bus interface. In Proceedings - 2009 WRI International Conference on Communications and Mobile Computing, CMC 2009. 2009. p. 606-608. 4797195. (Proceedings - 2009 WRI International Conference on Communications and Mobile Computing, CMC 2009). doi: 10.1109/CMC.2009.297

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abstract = "Minimizing the communication delay is one of the most important design considerations in System-on-a-Chip (SoC) design for mobile systems. In this paper, we present a bus interface design technique, called Efficient Bus Interface (EBI), to reduce the communication delay between the Intellectual Property (IP) core and the memory connected through AMBA3 AXI bus for mobile systems. Several mobile systems require huge multimedia data in the memory to be transferred to the IP core through bus. The proposed EBI is designed to reduce the memory access time by using double buffering, open row access, and bank interleaving. According to our simulations, the proposed EBI improves the performance of the target system by up to 51%.",

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Improving the system-on-a-chip performance for mobile systems by using efficient bus interface

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