Abstract
In this paper, we propose inverting logic-in-memory (LIM) cells comprising silicon nanowire feedback field-effect transistors with steep switching and holding characteristics. The timing diagrams of the proposed inverting LIM cells under dynamic and static conditions are investigated via mixed-mode technology computer-aided design simulation to verify the performance. The inverting LIM cells have an operating speed of the order of nanoseconds, an ultra-high voltage gain, and a longer retention time than that of conventional dynamic random access memory. The disturbance characteristics of half-selected cells within an inverting LIM array confirm the appropriate functioning of the random access memory array.
Original language | English |
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Article number | 225202 |
Journal | Nanotechnology |
Volume | 32 |
Issue number | 22 |
DOIs | |
Publication status | Published - 2021 May 28 |
Bibliographical note
Publisher Copyright:© 2021 IOP Publishing Ltd.
Keywords
- feedback field-effect transistors
- logicin-memory
- memory hierarchy
- mixed-mode simulation
- silicon nanowire
- switchable memory device
ASJC Scopus subject areas
- Bioengineering
- Chemistry(all)
- Materials Science(all)
- Mechanics of Materials
- Mechanical Engineering
- Electrical and Electronic Engineering