Inverting logic-in-memory cells comprising silicon nanowire feedback field-effect transistors

In this paper, we propose inverting logic-in-memory (LIM) cells comprising silicon nanowire feedback field-effect transistors with steep switching and holding characteristics. The timing diagrams of the proposed inverting LIM cells under dynamic and static conditions are investigated via mixed-mode technology computer-aided design simulation to verify the performance. The inverting LIM cells have an operating speed of the order of nanoseconds, an ultra-high voltage gain, and a longer retention time than that of conventional dynamic random access memory. The disturbance characteristics of half-selected cells within an inverting LIM array confirm the appropriate functioning of the random access memory array.