In this study, we design an inverter comprising a p-channel feedback field-effect transistor (p-FBFET) and an n-channel metal-oxide-semiconductor field-effect transistor and examine its logic and memory characteristics. For the transition of inverter from the logic '0' ('1') state to '1' ('0') state, the gain is 2001.6 V/V (1992.4 V/V). The steep switching characteristics and high on/off current ratio of the p-FBFET contribute to the high inverter gains. For an inverter with zero static power consumption, the logic states remain for more than 500 s. The long retention time allows the inverter proposed in this study to be applicable to logic-in-memory.
Bibliographical noteFunding Information:
This research was supported in part by a National Research Foundation of Korea (NRF) grant funded by the Korean government (NRF-2020R1A2C3004538), the Brain Korea 21 Plus Project of 2021 through the NRF funded by the Ministry of Science, ICT & Future Planning, and the Korea University Grant.
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- feedback field-effect transistors
- hysteresis characteristic
- positive feedback loop
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering
- Materials Chemistry