Logic and memory functions of an inverter comprising reconfigurable double gated feedback field effect transistors

Juhee Jeon, Sola Woo, Kyoungah Cho, Sangsig Kim

Research output: Contribution to journalArticlepeer-review

3 Citations (Scopus)

Abstract

In this study, we propose an inverter consisting of reconfigurable double-gated (DG) feedback field-effect transistors (FBFETs) and examine its logic and memory operations through a mixed-mode technology computer-aided design simulation. The DG FBFETs can be reconfigured to n- or p-channel modes, and these modes exhibit an on/off current ratio of ~ 1012 and a subthreshold swing (SS) of ~ 0.4 mV/dec. Our study suggests the solution to the output voltage loss, a common problem in FBFET-based inverters; the proposed inverter exhibits the same output logic voltage as the supply voltage in gigahertz frequencies by applying a reset operation between the logic operations. The inverter retains the output logic ‘1’ and ‘0’ states for ~ 21 s without the supply voltage. The proposed inverter demonstrates the promising potential for logic-in-memory application.

Original languageEnglish
Article number12534
JournalScientific reports
Volume12
Issue number1
DOIs
Publication statusPublished - 2022 Dec

Bibliographical note

Funding Information:
This research was supported in part by the National Research Foundation of Korea (NRF) grant funded by the Korean government (MSIT) (2020R1A2C3004538, 2022M3I7A3046571) and the Brain Korea 21 Plus Project in 2022.

Publisher Copyright:
© 2022, The Author(s).

ASJC Scopus subject areas

  • General

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