Logic-in-Memory Operation of Ternary NAND/NOR Universal Logic Gates using Double-Gated Feedback Field-Effect Transistors

Jaemin Son, Yunwoo Shin, Kyoungah Cho, Sangsig Kim

Research output: Contribution to journalArticlepeer-review

3 Citations (Scopus)

Abstract

In this study, the logic-in-memory operations are demonstrated of ternary NAND and NOR logic gates consisting of double-gated feedback field-effect transistors. The component transistors reconfigure their operation modes into n- or p-channel modes by adjusting the gate biases. The highly symmetrical operation between these operation modes with an excellent on-current ratio of 1.03 enables three distinguishable and stable logic levels in the ternary logic gates. Moreover, the ternary logic gates maintain the three logic states for several tens to hundreds of seconds under zero-bias condition. This study demonstrates that the ternary logic gates are promising candidates for next-generation low-power computing systems.

Original languageEnglish
Article number2201134
JournalAdvanced Electronic Materials
Volume9
Issue number4
DOIs
Publication statusPublished - 2023 Apr

Bibliographical note

Funding Information:
This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT) (NRF‐2020R1A2C3004538, NRF‐2022M3I7A3046571), the Brain Korea 21 Plus Project of 2022 through the NRF funded by the Ministry of Science, ICT & Future Planning, Samsung Electronics (IO201223‐08257‐01), and the Korea University Grant.

Publisher Copyright:
© 2023 The Authors. Advanced Electronic Materials published by Wiley-VCH GmbH.

Keywords

  • field-effect transistor
  • logic-in-memory
  • multivalued logic
  • positive feedback loop
  • universal gate

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials

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