Low-cost 7T-SRAM compute-in-memory design based on bit-line charge-sharing based analog-to-digital conversion

Kyeongho Lee; Joonhyung Kim; Jongsun Park

doi:10.1145/3508352.3549423

Low-cost 7T-SRAM compute-in-memory design based on bit-line charge-sharing based analog-to-digital conversion

Kyeongho Lee, Joonhyung Kim, Jongsun Park

School of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

5 Citations (Scopus)

Abstract

Although compute-in-memory (CIM) is considered as one of the promising solutions to overcome memory wall problem, the variations in analog voltage computation and analog- to-digital-converter (ADC) cost still remain as design challenges. In this paper, we present a 7T SRAM CIM that seamlessly supports multiply-accumulation (MAC) operation between 4-bit inputs and 8-bit weights. In the proposed CIM, highly parallel and robust MAC operations are enabled by exploiting the bit-line charge-sharing scheme to simultaneously process multiple inputs. For the readout of analog MAC values, instead of adopting the conventional ADC structure, the bit-line charge-sharing is efficiently used to reduce the implementation cost of the reference voltage generations. Based on the in-SRAM reference voltage generation and the parallel analog readout in all columns, the proposed CIM efficiently reduces ADC power and area cost. In addition, the variation models from Monte-Carlo simulations are also used during training to reduce the accuracy drop due to process variations. The implementation of 256×64 7T SRAM CIM using 28nm CMOS process shows that it operates in the wide voltage range from 0.6V to 1.2V with energy efficiency of 45.8-TOPS/W at 0.6V.

Original language	English
Title of host publication	Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2022
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781450392174
DOIs	https://doi.org/10.1145/3508352.3549423
Publication status	Published - 2022 Oct 30
Event	41st IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2022 - San Diego, United States Duration: 2022 Oct 30 → 2022 Nov 4

Publication series

Name	IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD
ISSN (Print)	1092-3152

Conference

Conference	41st IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2022
Country/Territory	United States
City	San Diego
Period	22/10/30 → 22/11/4

Bibliographical note

Funding Information:
This research was supported in part by the National Research Foundation of Korea grant funded by the Korea government (No. NRF-2020R1A2C3014820), in part by the Institute of Information and communications Technology Planning and evaluation (IITP) grant funded by the Korea government (MSIT) (No. 2022-0-00266, Development of Ultra-Low Power Low-Bit Precision Mixed-mode SRAM PIM), and Samsung Electronics (IO201211-08087-01). The EDA tool was supported by the IC Design Education Center (IDEC), Korea

Publisher Copyright:
© 2022 Association for Computing Machinery.

Keywords

Compute-in-memory (CIM)
In-SRAM reference voltage generation
SRAM
variation-aware training

ASJC Scopus subject areas

Software
Computer Science Applications
Computer Graphics and Computer-Aided Design

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

Access to Document

10.1145/3508352.3549423

Cite this

Lee, K., Kim, J., & Park, J. (2022). Low-cost 7T-SRAM compute-in-memory design based on bit-line charge-sharing based analog-to-digital conversion. In Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2022 Article 143 (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1145/3508352.3549423

Low-cost 7T-SRAM compute-in-memory design based on bit-line charge-sharing based analog-to-digital conversion. / Lee, Kyeongho; Kim, Joonhyung; Park, Jongsun.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2022. Institute of Electrical and Electronics Engineers Inc., 2022. 143 (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Lee, K, Kim, J & Park, J 2022, Low-cost 7T-SRAM compute-in-memory design based on bit-line charge-sharing based analog-to-digital conversion. in Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2022., 143, IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD, Institute of Electrical and Electronics Engineers Inc., 41st IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2022, San Diego, United States, 22/10/30. https://doi.org/10.1145/3508352.3549423

Lee K, Kim J, Park J. Low-cost 7T-SRAM compute-in-memory design based on bit-line charge-sharing based analog-to-digital conversion. In Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2022. Institute of Electrical and Electronics Engineers Inc. 2022. 143. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD). doi: 10.1145/3508352.3549423

Lee, Kyeongho ; Kim, Joonhyung ; Park, Jongsun. / Low-cost 7T-SRAM compute-in-memory design based on bit-line charge-sharing based analog-to-digital conversion. Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2022. Institute of Electrical and Electronics Engineers Inc., 2022. (IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD).

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Low-cost 7T-SRAM compute-in-memory design based on bit-line charge-sharing based analog-to-digital conversion

Abstract

Publication series

Conference

Bibliographical note

Keywords

ASJC Scopus subject areas

UN SDGs

Access to Document

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Cite this