Low cost ternary content addressable memory based on early termination precharge scheme

Kyeongho Lee; Geon Ko; Jongsun Park

doi:10.1109/ISCAS.2019.8702372

Low cost ternary content addressable memory based on early termination precharge scheme

Kyeongho Lee
, Geon Ko
, Jongsun Park

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

17 Citations (Scopus)

Abstract

In this paper, we present early termination match-line (ML) precharge scheme for low power and high speed ternary content addressable memory (TCAM). In the proposed TCAM, by employing the pre-decision based early termination, unnecessary ML precharging has been effectively eliminated while improving the search speed and achieving error-free operation. The reference voltage generator used to implement the proposed early termination approach can be simply designed using dummy row without large area overhead. According to the post-layout simulations with the 65nm CMOS process, the proposed early termination ML precharge scheme shows up to 30.4% of sensing delay improvement and 65.9% of ML power savings compared to the conventional approach. It also shows 8% of FOM (energy/bit/search) improvement compared to state-of-the-art works.

Original language	English
Title of host publication	2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781728103976
DOIs	https://doi.org/10.1109/ISCAS.2019.8702372
Publication status	Published - 2019
Event	2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Sapporo, Japan Duration: 2019 May 26 → 2019 May 29

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	2019-May
ISSN (Print)	0271-4310

Conference

Conference	2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019
Country/Territory	Japan
City	Sapporo
Period	19/5/26 → 19/5/29

Bibliographical note

Funding Information:
This work was supported by the National Research Foundation of Korea grant funded by the Korea government (NRF-2016 R1A2B4015329 and NRF-2015M3D1A1070465), and the Information Technology Research and Development Program of Korea Evaluation Institute of Industrial Technology [10052716, Design technology development of ultralow voltage operating circuit and IP for smart sensor SoC]

Publisher Copyright:
© 2019 IEEE

Keywords

CAM
Content addressable memory
Early termination precharge
Memory
Reference voltage
Sensing margin
TCAM

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/ISCAS.2019.8702372

Cite this

Lee, K., Ko, G., & Park, J. (2019). Low cost ternary content addressable memory based on early termination precharge scheme. In 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings Article 8702372 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2019-May). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2019.8702372

Low cost ternary content addressable memory based on early termination precharge scheme. / Lee, Kyeongho; Ko, Geon; Park, Jongsun.
2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2019. 8702372 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2019-May).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Lee, K, Ko, G & Park, J 2019, Low cost ternary content addressable memory based on early termination precharge scheme. in 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings., 8702372, Proceedings - IEEE International Symposium on Circuits and Systems, vol. 2019-May, Institute of Electrical and Electronics Engineers Inc., 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, 19/5/26. https://doi.org/10.1109/ISCAS.2019.8702372

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title = "Low cost ternary content addressable memory based on early termination precharge scheme",

abstract = "In this paper, we present early termination match-line (ML) precharge scheme for low power and high speed ternary content addressable memory (TCAM). In the proposed TCAM, by employing the pre-decision based early termination, unnecessary ML precharging has been effectively eliminated while improving the search speed and achieving error-free operation. The reference voltage generator used to implement the proposed early termination approach can be simply designed using dummy row without large area overhead. According to the post-layout simulations with the 65nm CMOS process, the proposed early termination ML precharge scheme shows up to 30.4\% of sensing delay improvement and 65.9\% of ML power savings compared to the conventional approach. It also shows 8\% of FOM (energy/bit/search) improvement compared to state-of-the-art works.",

keywords = "CAM, Content addressable memory, Early termination precharge, Memory, Reference voltage, Sensing margin, TCAM",

author = "Kyeongho Lee and Geon Ko and Jongsun Park",

note = "Funding Information: This work was supported by the National Research Foundation of Korea grant funded by the Korea government (NRF-2016 R1A2B4015329 and NRF-2015M3D1A1070465), and the Information Technology Research and Development Program of Korea Evaluation Institute of Industrial Technology [10052716, Design technology development of ultralow voltage operating circuit and IP for smart sensor SoC] Publisher Copyright: {\textcopyright} 2019 IEEE; 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 ; Conference date: 26-05-2019 Through 29-05-2019",

year = "2019",

doi = "10.1109/ISCAS.2019.8702372",

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AU - Lee, Kyeongho

AU - Ko, Geon

AU - Park, Jongsun

N1 - Funding Information: This work was supported by the National Research Foundation of Korea grant funded by the Korea government (NRF-2016 R1A2B4015329 and NRF-2015M3D1A1070465), and the Information Technology Research and Development Program of Korea Evaluation Institute of Industrial Technology [10052716, Design technology development of ultralow voltage operating circuit and IP for smart sensor SoC] Publisher Copyright: © 2019 IEEE

PY - 2019

Y1 - 2019

N2 - In this paper, we present early termination match-line (ML) precharge scheme for low power and high speed ternary content addressable memory (TCAM). In the proposed TCAM, by employing the pre-decision based early termination, unnecessary ML precharging has been effectively eliminated while improving the search speed and achieving error-free operation. The reference voltage generator used to implement the proposed early termination approach can be simply designed using dummy row without large area overhead. According to the post-layout simulations with the 65nm CMOS process, the proposed early termination ML precharge scheme shows up to 30.4% of sensing delay improvement and 65.9% of ML power savings compared to the conventional approach. It also shows 8% of FOM (energy/bit/search) improvement compared to state-of-the-art works.

AB - In this paper, we present early termination match-line (ML) precharge scheme for low power and high speed ternary content addressable memory (TCAM). In the proposed TCAM, by employing the pre-decision based early termination, unnecessary ML precharging has been effectively eliminated while improving the search speed and achieving error-free operation. The reference voltage generator used to implement the proposed early termination approach can be simply designed using dummy row without large area overhead. According to the post-layout simulations with the 65nm CMOS process, the proposed early termination ML precharge scheme shows up to 30.4% of sensing delay improvement and 65.9% of ML power savings compared to the conventional approach. It also shows 8% of FOM (energy/bit/search) improvement compared to state-of-the-art works.

KW - CAM

KW - Content addressable memory

KW - Early termination precharge

KW - Memory

KW - Reference voltage

KW - Sensing margin

KW - TCAM

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DO - 10.1109/ISCAS.2019.8702372

M3 - Conference contribution

AN - SCOPUS:85066793537

T3 - Proceedings - IEEE International Symposium on Circuits and Systems

BT - 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019

Y2 - 26 May 2019 through 29 May 2019

ER -

Low cost ternary content addressable memory based on early termination precharge scheme

Abstract

Publication series

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Bibliographical note

Keywords

ASJC Scopus subject areas

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