Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme

Woong Choi; Kyeongho Lee; Jongsun Park

doi:10.1109/ISCAS.2018.8351461

Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme

Woong Choi, Kyeongho Lee, Jongsun Park

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

29 Citations (Scopus)

Abstract

This paper presents an adaptive match-line (ML) discharging scheme for low power and high speed ternary content addressable memory (TCAM). In the proposed TCAM, by employing the gated ML pulldown path and ML boosting scheme, the redundant ML discharging and SL switching are eliminated while improving the search speed. By considering the number of mismatch and ML discharging speed, the ML discharging is adaptively controlled in the proposed TCAM. The simulation results with the 65nm CMOS technology show that the proposed adaptive ML discharging scheme improves up to 19% of sensing delay and saves 81% of ML power compared to the conventional approach. When compared with the state-of-the-art work, the post-layout simulations show 10% improvement of FOM (energy/bit/search).

Original language	English
Title of host publication	2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781538648810
DOIs	https://doi.org/10.1109/ISCAS.2018.8351461
Publication status	Published - 2018 Apr 26
Event	2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Florence, Italy Duration: 2018 May 27 → 2018 May 30

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	2018-May
ISSN (Print)	0271-4310

Other

Other	2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018
Country/Territory	Italy
City	Florence
Period	18/5/27 → 18/5/30

Bibliographical note

Funding Information:
This work was supported by the National Research Foundation of Korea grant funded by the Korea government (NRF-2016 R1A2B4015329 and NRF-2015M3D1A1070465), and the Information Technology Research and Development Program of Korea Evaluation Institute of Industrial Technology [10052716, Design technology development of ultralow voltage operating circuit and IP for smart sensor SoC]

Publisher Copyright:
© 2018 IEEE.

Keywords

CAM
TCAM
adaptive sensing
content addressable memory
memory
reference voltage
sensing margin

ASJC Scopus subject areas

Electrical and Electronic Engineering

Access to Document

10.1109/ISCAS.2018.8351461

Cite this

Choi, W., Lee, K., & Park, J. (2018). Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme. In 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings Article 8351461 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2018-May). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2018.8351461

Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme. / Choi, Woong; Lee, Kyeongho; Park, Jongsun.
2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2018. 8351461 (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 2018-May).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Choi, W, Lee, K & Park, J 2018, Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme. in 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings., 8351461, Proceedings - IEEE International Symposium on Circuits and Systems, vol. 2018-May, Institute of Electrical and Electronics Engineers Inc., 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018, Florence, Italy, 18/5/27. https://doi.org/10.1109/ISCAS.2018.8351461

Choi W, Lee K, Park J. Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme. In 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2018. 8351461. (Proceedings - IEEE International Symposium on Circuits and Systems). doi: 10.1109/ISCAS.2018.8351461

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title = "Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme",

abstract = "This paper presents an adaptive match-line (ML) discharging scheme for low power and high speed ternary content addressable memory (TCAM). In the proposed TCAM, by employing the gated ML pulldown path and ML boosting scheme, the redundant ML discharging and SL switching are eliminated while improving the search speed. By considering the number of mismatch and ML discharging speed, the ML discharging is adaptively controlled in the proposed TCAM. The simulation results with the 65nm CMOS technology show that the proposed adaptive ML discharging scheme improves up to 19% of sensing delay and saves 81% of ML power compared to the conventional approach. When compared with the state-of-the-art work, the post-layout simulations show 10% improvement of FOM (energy/bit/search).",

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note = "Funding Information: This work was supported by the National Research Foundation of Korea grant funded by the Korea government (NRF-2016 R1A2B4015329 and NRF-2015M3D1A1070465), and the Information Technology Research and Development Program of Korea Evaluation Institute of Industrial Technology [10052716, Design technology development of ultralow voltage operating circuit and IP for smart sensor SoC] Publisher Copyright: {\textcopyright} 2018 IEEE.; 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 ; Conference date: 27-05-2018 Through 30-05-2018",

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AU - Lee, Kyeongho

AU - Park, Jongsun

N1 - Funding Information: This work was supported by the National Research Foundation of Korea grant funded by the Korea government (NRF-2016 R1A2B4015329 and NRF-2015M3D1A1070465), and the Information Technology Research and Development Program of Korea Evaluation Institute of Industrial Technology [10052716, Design technology development of ultralow voltage operating circuit and IP for smart sensor SoC] Publisher Copyright: © 2018 IEEE.

PY - 2018/4/26

Y1 - 2018/4/26

N2 - This paper presents an adaptive match-line (ML) discharging scheme for low power and high speed ternary content addressable memory (TCAM). In the proposed TCAM, by employing the gated ML pulldown path and ML boosting scheme, the redundant ML discharging and SL switching are eliminated while improving the search speed. By considering the number of mismatch and ML discharging speed, the ML discharging is adaptively controlled in the proposed TCAM. The simulation results with the 65nm CMOS technology show that the proposed adaptive ML discharging scheme improves up to 19% of sensing delay and saves 81% of ML power compared to the conventional approach. When compared with the state-of-the-art work, the post-layout simulations show 10% improvement of FOM (energy/bit/search).

AB - This paper presents an adaptive match-line (ML) discharging scheme for low power and high speed ternary content addressable memory (TCAM). In the proposed TCAM, by employing the gated ML pulldown path and ML boosting scheme, the redundant ML discharging and SL switching are eliminated while improving the search speed. By considering the number of mismatch and ML discharging speed, the ML discharging is adaptively controlled in the proposed TCAM. The simulation results with the 65nm CMOS technology show that the proposed adaptive ML discharging scheme improves up to 19% of sensing delay and saves 81% of ML power compared to the conventional approach. When compared with the state-of-the-art work, the post-layout simulations show 10% improvement of FOM (energy/bit/search).

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KW - content addressable memory

KW - memory

KW - reference voltage

KW - sensing margin

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T3 - Proceedings - IEEE International Symposium on Circuits and Systems

BT - 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings

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Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme

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Keywords

ASJC Scopus subject areas

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