@inproceedings{add18ac07b0d49fdb0166c1db378ff41,
title = "Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme",
abstract = "This paper presents an adaptive match-line (ML) discharging scheme for low power and high speed ternary content addressable memory (TCAM). In the proposed TCAM, by employing the gated ML pulldown path and ML boosting scheme, the redundant ML discharging and SL switching are eliminated while improving the search speed. By considering the number of mismatch and ML discharging speed, the ML discharging is adaptively controlled in the proposed TCAM. The simulation results with the 65nm CMOS technology show that the proposed adaptive ML discharging scheme improves up to 19% of sensing delay and saves 81% of ML power compared to the conventional approach. When compared with the state-of-the-art work, the post-layout simulations show 10% improvement of FOM (energy/bit/search).",
keywords = "CAM, TCAM, adaptive sensing, content addressable memory, memory, reference voltage, sensing margin",
author = "Woong Choi and Kyeongho Lee and Jongsun Park",
note = "Funding Information: This work was supported by the National Research Foundation of Korea grant funded by the Korea government (NRF-2016 R1A2B4015329 and NRF-2015M3D1A1070465), and the Information Technology Research and Development Program of Korea Evaluation Institute of Industrial Technology [10052716, Design technology development of ultralow voltage operating circuit and IP for smart sensor SoC] Publisher Copyright: {\textcopyright} 2018 IEEE.; 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 ; Conference date: 27-05-2018 Through 30-05-2018",
year = "2018",
month = apr,
day = "26",
doi = "10.1109/ISCAS.2018.8351461",
language = "English",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings",
}