Running a convolutional neural network (CNN) algorithm using dedicated integrated circuits (ICs) on real-time portable applications is mainly restricted by slow performance and large power consumption. The power and delay are mainly due to external memory access, which incurs considerable energy consumption and bandwidth issues. In this paper, we propose an efficient convolution layer design using domain wall memory (DWM) for eliminating external memory access in image sensor embedded applications. A low energy access scheme using tag is employed to further reduce power consumption. The experimental results show that the proposed CNN architecture achieves 11.2% memory energy savings and 21.8% of MAC operation reduction compared to conventional architecture.
|Title of host publication
|2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings
|Institute of Electrical and Electronics Engineers Inc.
|Published - 2021
|53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Daegu, Korea, Republic of
Duration: 2021 May 22 → 2021 May 28
|Proceedings - IEEE International Symposium on Circuits and Systems
|53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021
|Korea, Republic of
|21/5/22 → 21/5/28
Bibliographical noteFunding Information:
This work was supported in part by the National Research Foundation of Korea grant funded by the Korea government (NRF-2015M3D1A1070465), in part by National R&D Program through the National Research Foundation of Korea funded by Ministry of Science and ICT (NRF- 2020M3F3A2A01082591), and in part by the National Research Foundation of Korea grant funded by the Korea government (NRF- 2020R1A2C3014820).
© 2021 IEEE
- Convolution neural network
- Domain wall memory
ASJC Scopus subject areas
- Electrical and Electronic Engineering