Low-power design of hardware one-time password generators for card-type OTPs

Sung Jae Lee, Jae Seong Lee, Mun Kyu Lee, Sang Jin Lee, Doo Ho Choi, Dong Kyue Kim

Research output: Contribution to journalArticlepeer-review

8 Citations (Scopus)


Since card-type one-time password (OTP) generators became available, power and area consumption has been one of the main issues of hardware OTPs. Because relatively smaller batteries and smaller chip areas are available for this type of OTP compared to existing tokentype OTPs, it is necessary to implement power-efficient and compact dedicated OTP hardware modules. In this paper, we design and implement a low-power small-area hardware OTP generator based on the Advanced Encryption Standard (AES). First, we implement a prototype AES hardware module using a 350 nm process to verify the effectiveness of our optimization techniques for the SubBytes transform and data storage. Next, we apply the optimized AES to a real-world OTP hardware module which is implemented using a 180 nm process. Our experimental results show the power consumption of our OTP module using the new AES implementation is only 49.4% and 15.0% of those of an HOTP and softwarebased OTP, respectively.

Original languageEnglish
Pages (from-to)611-620
Number of pages10
JournalETRI Journal
Issue number4
Publication statusPublished - 2011 Aug


  • AES
  • Cardtype OTP
  • HMAC
  • Low-power hardware implementation
  • One-time password

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • General Computer Science
  • Electrical and Electronic Engineering


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