Low temperature epoxy bonding for wafer level MEMS packaging

Yong Kook Kim, Eun Kyung Kim, Soo Won Kim, Byeong Kwon Ju

Research output: Contribution to journalArticlepeer-review

55 Citations (Scopus)


In this paper, we report on a technology for wafer-level MEMS packaging with vertical via holes and low temperature bonding using a patternable B stage epoxy. We fabricated via holes for vertical feed-throughs and then applied bottom-up copper electroplating to fill the via holes. For low temperature wafer level packaging, we used B-stage epoxy bonding in the sealing line. The optimal bonding parameters were 150 °C and 30 min. The tensile strength was about 15 MPa. Therefore, this packaging technology can be used for low temperature wafer level packaging for many MEMS devices.

Original languageEnglish
Pages (from-to)323-328
Number of pages6
JournalSensors and Actuators, A: Physical
Issue number2
Publication statusPublished - 2008 May 16

Bibliographical note

Funding Information:
This project is conducted through the Practical Application Project of Advanced Microsystems Packaging Program of Seoul Technopark, funded by the Ministry of Commerce, Industry and Energy.


  • Cu via
  • Epoxy bonding
  • Low temperature
  • Microelectromechanical system (MEMS)
  • Wafer level packaging

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Instrumentation
  • Condensed Matter Physics
  • Surfaces, Coatings and Films
  • Metals and Alloys
  • Electrical and Electronic Engineering


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