Mitigating Heavy Ion Irradiation-Induced Degradation in p-type SnO Thin-Film Transistors at Room Temperature

The study investigates the mitigation of radiation damage on p-type SnO thin-film transistors (TFTs) with a fast, room-temperature annealing process. Atomic layer deposition is utilized to fabricate bottom-gate TFTs of high-quality p-type SnO layers. After 2.8 MeV Au⁴⁺ irradiation at a fluence level of 5.2 × 10¹² ions cm⁻², the output drain current and on/off current ratio (I_on/I_off) decrease by more than one order of magnitude, field-effect mobility (μ_FE) reduces more than four times, and subthreshold swing (SS) increases more than four times along with a negative shift in threshold voltage. The observed degradation is attributed to increased surface roughness and defect density, as confirmed by scanning electron microscopy (SEM), high-resolution micro-Raman, and transmission electron microscopy (TEM) with geometric phase analysis (GPA). A technique is demonstrated to recover the device performance at room temperature and in less than a minute, using the electron wind force (EWF) obtained from low-duty-cycle high-density pulsed current. At a pulsed current density of 4.0 × 10⁵ A cm⁻², approximately four times increase in I_on/I_off is observed, 41% increase in μ_FE, and 20% decrease in the SS of the irradiated TFTs, suggesting effectiveness of the new annealing technique.