TY - GEN
T1 - Multi-channel waveform sampling ASIC for animal PET system
AU - Shimazoe, K.
AU - Yeom, J. Y.
AU - Takahashi, H.
AU - Kojo, T.
AU - Minamikawa, Y.
AU - Fujita, K.
AU - Murayama, H.
PY - 2006
Y1 - 2006
N2 - We have designed and fabricated 2.4mm by 2.4mm 2ch 100MHz/6bits waveform sampling front-end (WSFE) ASIC for PET(Positron Emission Tomography) with multiplexer readouts. This chip was designed for GSO-APD gamma-ray detectors and has the function of "waveform sampling" at the speed of 100MHz.One channel of this chip consists of charge-sensitive preamplifier, VGA (Variable Gain Amplifier), folding-ADC and digital readout circuit and converts the waveform of detector signal to digital values at the speed of ∼100MHz.This digitization in early stage enables flexible digital processing to get timing and energy information of gamma-rays which is indispensable for PET system. Digital circuit has three ways to read signals out, parallel readout, 32words FIFO memory and 2 to 1 multiplexer. The 2 to 1 multiplexer reduces the number of ASIC pins half by using fast clock with double frequency and enables to include more channels in a chip. We designed new 18channel WSFE ASIC which includes 2 to 1 multiplexer, 3 toi multiplexer and 6 to 1 multiplexer. These multiplexers will greatly decrease the number of pins and realize high integration. This chip will be used for APD-based DOI PET system which requires multi-channel ASIC.
AB - We have designed and fabricated 2.4mm by 2.4mm 2ch 100MHz/6bits waveform sampling front-end (WSFE) ASIC for PET(Positron Emission Tomography) with multiplexer readouts. This chip was designed for GSO-APD gamma-ray detectors and has the function of "waveform sampling" at the speed of 100MHz.One channel of this chip consists of charge-sensitive preamplifier, VGA (Variable Gain Amplifier), folding-ADC and digital readout circuit and converts the waveform of detector signal to digital values at the speed of ∼100MHz.This digitization in early stage enables flexible digital processing to get timing and energy information of gamma-rays which is indispensable for PET system. Digital circuit has three ways to read signals out, parallel readout, 32words FIFO memory and 2 to 1 multiplexer. The 2 to 1 multiplexer reduces the number of ASIC pins half by using fast clock with double frequency and enables to include more channels in a chip. We designed new 18channel WSFE ASIC which includes 2 to 1 multiplexer, 3 toi multiplexer and 6 to 1 multiplexer. These multiplexers will greatly decrease the number of pins and realize high integration. This chip will be used for APD-based DOI PET system which requires multi-channel ASIC.
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U2 - 10.1109/NSSMIC.2006.354412
DO - 10.1109/NSSMIC.2006.354412
M3 - Conference contribution
AN - SCOPUS:38649115047
SN - 1424405610
SN - 9781424405619
T3 - IEEE Nuclear Science Symposium Conference Record
SP - 2473
EP - 2475
BT - 2006 IEEE Nuclear Science Symposium - Conference Record
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2006 IEEE Nuclear Science Symposium, Medical Imaging Conference and 15th International Workshop on Room-Temperature Semiconductor X- and Gamma-Ray Detectors, Special Focus Workshops, NSS/MIC/RTSD
Y2 - 29 October 2006 through 4 November 2006
ER -