Abstract
A single transistor type ferroelectric memory with multiple bit operation was presented. This cell has a metal ferroelectric insulator semiconductor field effect transistor structure. Y2O3 thin film was used as a buffer insulating layer to improve the memory characteristics and SrBi 2Ta2O9 was used as a ferroelectric gate material. The multi-level characteristics of four levels with one order of drain current difference were measured according to the writing voltage step of two volt. This multi-level memory cell enables to increase the density of memory in the same space and lower the cost.
Original language | English |
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Pages (from-to) | 203-211 |
Number of pages | 9 |
Journal | Integrated Ferroelectrics |
Volume | 65 |
DOIs | |
Publication status | Published - 2004 |
Keywords
- Ferroelectric
- FRAM
- MFISFET
- Multi-level
- SBT
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Control and Systems Engineering
- Ceramics and Composites
- Condensed Matter Physics
- Electrical and Electronic Engineering
- Materials Chemistry