Multiple bit operation of MFISFET with Pt/SrBi2Ta 2O9/Y2O3/Si gate structure

Sun Il Shim; Young Suk Kwon; Ik Soo Kim; Seong Il Kim; Yong Tae Kim; Jung Ho Park

doi:10.1080/10584580490893079

Multiple bit operation of MFISFET with Pt/SrBi₂Ta ₂O₉/Y₂O₃/Si gate structure

Sun Il Shim, Young Suk Kwon, Ik Soo Kim, Seong Il Kim, Yong Tae Kim, Jung Ho Park

Research output: Contribution to journal › Article › peer-review

Abstract

A single transistor type ferroelectric memory with multiple bit operation was presented. This cell has a metal ferroelectric insulator semiconductor field effect transistor structure. Y₂O₃ thin film was used as a buffer insulating layer to improve the memory characteristics and SrBi ₂Ta₂O₉ was used as a ferroelectric gate material. The multi-level characteristics of four levels with one order of drain current difference were measured according to the writing voltage step of two volt. This multi-level memory cell enables to increase the density of memory in the same space and lower the cost.

Original language	English
Pages (from-to)	203-211
Number of pages	9
Journal	Integrated Ferroelectrics
Volume	65
DOIs	https://doi.org/10.1080/10584580490893079
Publication status	Published - 2004

Keywords

FRAM
Ferroelectric
MFISFET
Multi-level
SBT

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Control and Systems Engineering
Ceramics and Composites
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

Access to Document

10.1080/10584580490893079

Cite this

@article{d47e7247fb1d4b009acab0e698cb8ce4,

title = "Multiple bit operation of MFISFET with Pt/SrBi2Ta 2O9/Y2O3/Si gate structure",

abstract = "A single transistor type ferroelectric memory with multiple bit operation was presented. This cell has a metal ferroelectric insulator semiconductor field effect transistor structure. Y2O3 thin film was used as a buffer insulating layer to improve the memory characteristics and SrBi 2Ta2O9 was used as a ferroelectric gate material. The multi-level characteristics of four levels with one order of drain current difference were measured according to the writing voltage step of two volt. This multi-level memory cell enables to increase the density of memory in the same space and lower the cost.",

keywords = "FRAM, Ferroelectric, MFISFET, Multi-level, SBT",

author = "Shim, {Sun Il} and Kwon, {Young Suk} and Kim, {Ik Soo} and Kim, {Seong Il} and Kim, {Yong Tae} and Park, {Jung Ho}",

year = "2004",

doi = "10.1080/10584580490893079",

language = "English",

volume = "65",

pages = "203--211",

journal = "Integrated Ferroelectrics",

issn = "1058-4587",

publisher = "Taylor and Francis Ltd.",

}

TY - JOUR

T1 - Multiple bit operation of MFISFET with Pt/SrBi2Ta 2O9/Y2O3/Si gate structure

AU - Shim, Sun Il

AU - Kwon, Young Suk

AU - Kim, Ik Soo

AU - Kim, Seong Il

AU - Kim, Yong Tae

AU - Park, Jung Ho

PY - 2004

Y1 - 2004

N2 - A single transistor type ferroelectric memory with multiple bit operation was presented. This cell has a metal ferroelectric insulator semiconductor field effect transistor structure. Y2O3 thin film was used as a buffer insulating layer to improve the memory characteristics and SrBi 2Ta2O9 was used as a ferroelectric gate material. The multi-level characteristics of four levels with one order of drain current difference were measured according to the writing voltage step of two volt. This multi-level memory cell enables to increase the density of memory in the same space and lower the cost.

AB - A single transistor type ferroelectric memory with multiple bit operation was presented. This cell has a metal ferroelectric insulator semiconductor field effect transistor structure. Y2O3 thin film was used as a buffer insulating layer to improve the memory characteristics and SrBi 2Ta2O9 was used as a ferroelectric gate material. The multi-level characteristics of four levels with one order of drain current difference were measured according to the writing voltage step of two volt. This multi-level memory cell enables to increase the density of memory in the same space and lower the cost.

KW - FRAM

KW - Ferroelectric

KW - MFISFET

KW - Multi-level

KW - SBT

UR - http://www.scopus.com/inward/record.url?scp=33751252600&partnerID=8YFLogxK

U2 - 10.1080/10584580490893079

DO - 10.1080/10584580490893079

M3 - Article

AN - SCOPUS:33751252600

SN - 1058-4587

VL - 65

SP - 203

EP - 211

JO - Integrated Ferroelectrics

JF - Integrated Ferroelectrics

ER -