Abstract
Full adder (FA)-based converters are proposed for efficiently performing complex number calculations. The basic idea is to use FA arrays to decompose 2i terms into 2j terms, where j < i, by modulo arithmetic. FA-based converters show less hardware complexity and faster execution than ROM-based ones. The time-complexity product of FA-based converters is also much less than that of ROM-based ones.
Original language | English |
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Pages (from-to) | 2959-2962 |
Number of pages | 4 |
Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
Volume | 5 |
Publication status | Published - 1991 |
Externally published | Yes |
Event | 1991 IEEE International Symposium on Circuits and Systems Part 4 (of 5) - Singapore, Singapore Duration: 1991 Jun 11 → 1991 Jun 14 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering