TY - GEN
T1 - NMOS Energy Recovery Logic
AU - Kim, Chulwoo
AU - Yoo, Seung Moon
AU - Kang, Sung Mo
PY - 1999
Y1 - 1999
N2 - In this paper, we describe NMOS Energy Recovery Logic (NERL) which exhibits high throughput with low energy consumption due to efficient energy transfer and recovery using adiabatic and bootstrapping. NERL shows full output voltage swing, insensitivity to output load capacitance, less dependency on power-clock frequency and complementary outputs for balanced capacitance load to power-clock. We have designed an 8-bit CLA and inverter chain using 0.6 μm CMOS technology and verified that NERL saves energy over ECRL by 2 to 3 times.
AB - In this paper, we describe NMOS Energy Recovery Logic (NERL) which exhibits high throughput with low energy consumption due to efficient energy transfer and recovery using adiabatic and bootstrapping. NERL shows full output voltage swing, insensitivity to output load capacitance, less dependency on power-clock frequency and complementary outputs for balanced capacitance load to power-clock. We have designed an 8-bit CLA and inverter chain using 0.6 μm CMOS technology and verified that NERL saves energy over ECRL by 2 to 3 times.
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M3 - Conference contribution
AN - SCOPUS:0033361490
SN - 0769501044
T3 - Proceedings of the IEEE Great Lakes Symposium on VLSI
SP - 310
EP - 313
BT - Proceedings of the IEEE Great Lakes Symposium on VLSI
PB - IEEE
T2 - Proceedings of the 1999 9th Great Lakes Symposium on VLSI (GLSVLSI '99)
Y2 - 4 March 1999 through 6 March 1999
ER -