Abstract
In this paper, we optimize and investigate Ge n+/p and p +/n junction diodes formed by Co metal-induced dopant activation technique at the activation temperature range between 300 °C and 420 °C in terms of on/ off-current ratio. Combining this low-temperature n +/p and p+/n junction formation technique with a low-temperature gate stack comprised of Al/Al2O3/GeO 2 by ozone oxidation technique, we demonstrate n- and p-channel Ge metal-oxide-semiconductor field-effect transistors (MOSFETs), respectively, at sub-360 °C and 380 °C. This low-temperature Ge MOSFET process can be utilized to integrate Ge complementary metal-oxide-semiconductor devices above interconnect layers for monolithic 3-D integrated circuits.
| Original language | English |
|---|---|
| Article number | 5770202 |
| Pages (from-to) | 2394-2400 |
| Number of pages | 7 |
| Journal | IEEE Transactions on Electron Devices |
| Volume | 58 |
| Issue number | 8 |
| DOIs | |
| Publication status | Published - 2011 Aug |
| Externally published | Yes |
Bibliographical note
Funding Information:Manuscript received January 27, 2011; accepted April 21, 2011. Date of publication May 19, 2011; date of current version July 22, 2011. This work was supported by the Defense Advanced Research Projects Agency 3-D-Integrated Circuits Program and was done in Stanford Nanofabrication Facility of National Nanotechnology Infrastructure Network. The review of this paper was arranged by Editor M. J. Kumar.
Keywords
- Germanium (Ge) junction diode
- metal-induced crystallization (MIC)
- metal-induced dopants activation (MIDA)
- monolithic 3-D integrated circuit (3-D-IC)
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering