Parallel configuration of oscillator for strong harmonics suppression and frequency doubler

K. J. Lee; C. W. Jang; J. P. Ko; Y. S. Kim

doi:10.1109/APMC.2005.1607068

Parallel configuration of oscillator for strong harmonics suppression and frequency doubler

K. J. Lee, C. W. Jang, J. P. Ko, Y. S. Kim

* Honorary professors

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Citations (Scopus)

Abstract

In this paper, a low noise parallel feedback oscillator for harmonic suppression and a frequency doubler are presented. In the oscillator design, as the fundamental signal is extracted between the dielectric resonator (DR) filter and the gate of the active device, the undesired harmonics at the output of the oscillator are remarkably suppressed. The fundamental signal of the oscillator directly feeds to the frequency doubler without an additional band pass filter to suppress spurious harmonics. The second harmonic suppression of -47.7 dBc at the single oscillator output and the fundamental suppression of -37.5 dBc at the frequency doubler output are achieved, respectably.

Original language	English
Title of host publication	APMC 2005
Subtitle of host publication	Asia-Pacific Microwave Conference Proceedings 2005
DOIs	https://doi.org/10.1109/APMC.2005.1607068
Publication status	Published - 2005
Event	APMC 2005: Asia-Pacific Microwave Conference 2005 - Suzhou, China Duration: 2005 Dec 4 → 2005 Dec 7

Publication series

Name	Asia-Pacific Microwave Conference Proceedings, APMC
Volume	5

Other

Other	APMC 2005: Asia-Pacific Microwave Conference 2005
Country/Territory	China
City	Suzhou
Period	05/12/4 → 05/12/7

ASJC Scopus subject areas

Engineering(all)

Access to Document

10.1109/APMC.2005.1607068

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Lee, KJ, Jang, CW, Ko, JP & Kim, YS 2005, Parallel configuration of oscillator for strong harmonics suppression and frequency doubler. in APMC 2005: Asia-Pacific Microwave Conference Proceedings 2005., 1607068, Asia-Pacific Microwave Conference Proceedings, APMC, vol. 5, APMC 2005: Asia-Pacific Microwave Conference 2005, Suzhou, China, 05/12/4. https://doi.org/10.1109/APMC.2005.1607068

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title = "Parallel configuration of oscillator for strong harmonics suppression and frequency doubler",

abstract = "In this paper, a low noise parallel feedback oscillator for harmonic suppression and a frequency doubler are presented. In the oscillator design, as the fundamental signal is extracted between the dielectric resonator (DR) filter and the gate of the active device, the undesired harmonics at the output of the oscillator are remarkably suppressed. The fundamental signal of the oscillator directly feeds to the frequency doubler without an additional band pass filter to suppress spurious harmonics. The second harmonic suppression of -47.7 dBc at the single oscillator output and the fundamental suppression of -37.5 dBc at the frequency doubler output are achieved, respectably.",

author = "Lee, {K. J.} and Jang, {C. W.} and Ko, {J. P.} and Kim, {Y. S.}",

year = "2005",

doi = "10.1109/APMC.2005.1607068",

language = "English",

isbn = "078039433X",

series = "Asia-Pacific Microwave Conference Proceedings, APMC",

booktitle = "APMC 2005",

note = "APMC 2005: Asia-Pacific Microwave Conference 2005 ; Conference date: 04-12-2005 Through 07-12-2005",

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AU - Lee, K. J.

AU - Jang, C. W.

AU - Ko, J. P.

AU - Kim, Y. S.

PY - 2005

Y1 - 2005

N2 - In this paper, a low noise parallel feedback oscillator for harmonic suppression and a frequency doubler are presented. In the oscillator design, as the fundamental signal is extracted between the dielectric resonator (DR) filter and the gate of the active device, the undesired harmonics at the output of the oscillator are remarkably suppressed. The fundamental signal of the oscillator directly feeds to the frequency doubler without an additional band pass filter to suppress spurious harmonics. The second harmonic suppression of -47.7 dBc at the single oscillator output and the fundamental suppression of -37.5 dBc at the frequency doubler output are achieved, respectably.

AB - In this paper, a low noise parallel feedback oscillator for harmonic suppression and a frequency doubler are presented. In the oscillator design, as the fundamental signal is extracted between the dielectric resonator (DR) filter and the gate of the active device, the undesired harmonics at the output of the oscillator are remarkably suppressed. The fundamental signal of the oscillator directly feeds to the frequency doubler without an additional band pass filter to suppress spurious harmonics. The second harmonic suppression of -47.7 dBc at the single oscillator output and the fundamental suppression of -37.5 dBc at the frequency doubler output are achieved, respectably.

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U2 - 10.1109/APMC.2005.1607068

DO - 10.1109/APMC.2005.1607068

M3 - Conference contribution

AN - SCOPUS:33847235415

SN - 078039433X

SN - 9780780394339

T3 - Asia-Pacific Microwave Conference Proceedings, APMC

BT - APMC 2005

T2 - APMC 2005: Asia-Pacific Microwave Conference 2005

Y2 - 4 December 2005 through 7 December 2005

ER -

Parallel configuration of oscillator for strong harmonics suppression and frequency doubler

Abstract

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