TY - GEN
T1 - Parallel configuration of oscillator for strong harmonics suppression and frequency doubler
AU - Lee, K. J.
AU - Jang, C. W.
AU - Ko, J. P.
AU - Kim, Y. S.
PY - 2005
Y1 - 2005
N2 - In this paper, a low noise parallel feedback oscillator for harmonic suppression and a frequency doubler are presented. In the oscillator design, as the fundamental signal is extracted between the dielectric resonator (DR) filter and the gate of the active device, the undesired harmonics at the output of the oscillator are remarkably suppressed. The fundamental signal of the oscillator directly feeds to the frequency doubler without an additional band pass filter to suppress spurious harmonics. The second harmonic suppression of -47.7 dBc at the single oscillator output and the fundamental suppression of -37.5 dBc at the frequency doubler output are achieved, respectably.
AB - In this paper, a low noise parallel feedback oscillator for harmonic suppression and a frequency doubler are presented. In the oscillator design, as the fundamental signal is extracted between the dielectric resonator (DR) filter and the gate of the active device, the undesired harmonics at the output of the oscillator are remarkably suppressed. The fundamental signal of the oscillator directly feeds to the frequency doubler without an additional band pass filter to suppress spurious harmonics. The second harmonic suppression of -47.7 dBc at the single oscillator output and the fundamental suppression of -37.5 dBc at the frequency doubler output are achieved, respectably.
UR - https://www.scopus.com/pages/publications/33847235415
U2 - 10.1109/APMC.2005.1607068
DO - 10.1109/APMC.2005.1607068
M3 - Conference contribution
AN - SCOPUS:33847235415
SN - 078039433X
SN - 9780780394339
T3 - Asia-Pacific Microwave Conference Proceedings, APMC
BT - APMC 2005
T2 - APMC 2005: Asia-Pacific Microwave Conference 2005
Y2 - 4 December 2005 through 7 December 2005
ER -