Abstract
In this study, graphene was mechanically deposited on SiO 2/Si substrate, followed by ohmic metallization using electron-beam lithography. Finite element analysis was employed to characterize the operating temperature of graphene-based devices using the experimentally determined currentvoltage data. The temperature of the hottest spot where the underlying SiO 2 layer was 300 nm thick was elevated up to about 70 °C at a 10 mW dissipated power. However, the operating temperature dropped to about 50 °C when the 300 nm thick SiO 2 layer was replaced with a 20 nm thick SiO 2 layer. Thermal management is very critical in the reliability of graphene-based high speed electronic devices because the high operating temperature can degrade the device performance.
Original language | English |
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Pages (from-to) | 4889-4892 |
Number of pages | 4 |
Journal | Journal of Nanoscience and Nanotechnology |
Volume | 10 |
Issue number | 8 |
DOIs | |
Publication status | Published - 2010 Aug |
Keywords
- Channel temperature
- Graphene
- Transistor
ASJC Scopus subject areas
- Bioengineering
- General Chemistry
- Biomedical Engineering
- General Materials Science
- Condensed Matter Physics