Prominoc: An efficient network-on-chip design for flexible data permutation

Phi Hung Pham; Jongsun Park; Chulwoo Kim

doi:10.1587/elex.7.861

Prominoc: An efficient network-on-chip design for flexible data permutation

Phi Hung Pham^*, Jongsun Park, Chulwoo Kim

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

1 Citation (Scopus)

Abstract

This paper presents a novel Network-on-Chip design to efficiently support data-interleaving with arbitrary permutation rule. The proposed NoC offers a run-time conflict resolution for interleaved data under arbitrary permutation rule by using a circuit-switching approach combined with a dynamic path-probing scheme. Experimental results in a 0.18μm STD-cell CMOS process show that the proposed NoC can offer an aggregate bandwidth of up to 522.4Gb/s, while occupying a compact area of 0.473mm2 (52kGates). A comparison with other interleaving networks shows the efficiency of the proposed design.

Original language	English
Pages (from-to)	861-866
Number of pages	6
Journal	ieice electronics express
Volume	7
Issue number	12
DOIs	https://doi.org/10.1587/elex.7.861
Publication status	Published - 2010 Jun 25

Keywords

Data permutation
Network-on-chip
On-chip router

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering

Access to Document

10.1587/elex.7.861

Cite this

@article{0bdee70c3b584f5fb50b64a753db2683,

title = "Prominoc: An efficient network-on-chip design for flexible data permutation",

abstract = "This paper presents a novel Network-on-Chip design to efficiently support data-interleaving with arbitrary permutation rule. The proposed NoC offers a run-time conflict resolution for interleaved data under arbitrary permutation rule by using a circuit-switching approach combined with a dynamic path-probing scheme. Experimental results in a 0.18μm STD-cell CMOS process show that the proposed NoC can offer an aggregate bandwidth of up to 522.4Gb/s, while occupying a compact area of 0.473mm2 (52kGates). A comparison with other interleaving networks shows the efficiency of the proposed design.",

keywords = "Data permutation, Network-on-chip, On-chip router",

author = "Pham, \{Phi Hung\} and Jongsun Park and Chulwoo Kim",

year = "2010",

month = jun,

day = "25",

doi = "10.1587/elex.7.861",

language = "English",

volume = "7",

pages = "861--866",

journal = "ieice electronics express",

issn = "1349-2543",

publisher = "Institute of Electronics Information Communication Engineers",

number = "12",

}

TY - JOUR

T1 - Prominoc

T2 - An efficient network-on-chip design for flexible data permutation

AU - Pham, Phi Hung

AU - Park, Jongsun

AU - Kim, Chulwoo

PY - 2010/6/25

Y1 - 2010/6/25

N2 - This paper presents a novel Network-on-Chip design to efficiently support data-interleaving with arbitrary permutation rule. The proposed NoC offers a run-time conflict resolution for interleaved data under arbitrary permutation rule by using a circuit-switching approach combined with a dynamic path-probing scheme. Experimental results in a 0.18μm STD-cell CMOS process show that the proposed NoC can offer an aggregate bandwidth of up to 522.4Gb/s, while occupying a compact area of 0.473mm2 (52kGates). A comparison with other interleaving networks shows the efficiency of the proposed design.

AB - This paper presents a novel Network-on-Chip design to efficiently support data-interleaving with arbitrary permutation rule. The proposed NoC offers a run-time conflict resolution for interleaved data under arbitrary permutation rule by using a circuit-switching approach combined with a dynamic path-probing scheme. Experimental results in a 0.18μm STD-cell CMOS process show that the proposed NoC can offer an aggregate bandwidth of up to 522.4Gb/s, while occupying a compact area of 0.473mm2 (52kGates). A comparison with other interleaving networks shows the efficiency of the proposed design.

KW - Data permutation

KW - Network-on-chip

KW - On-chip router

UR - https://www.scopus.com/pages/publications/77954246828

U2 - 10.1587/elex.7.861

DO - 10.1587/elex.7.861

M3 - Article

AN - SCOPUS:77954246828

SN - 1349-2543

VL - 7

SP - 861

EP - 866

JO - ieice electronics express

JF - ieice electronics express

IS - 12

ER -

Prominoc: An efficient network-on-chip design for flexible data permutation

Abstract

Keywords

ASJC Scopus subject areas

Access to Document

Other files and links

Fingerprint

Cite this