Memory hierarchy among conventional memory technologies is one of the main bottlenecks in modern computer systems; alternative memory technologies are thus necessary for quasi-nonvolatile memory applications. Herein, a fully complementary metal-oxide-semiconductor-compatible quasi-nonvolatile memory composed of p+-n-p-n+ silicon on a silicon-on-insulator substrate is presented. The quasi-nonvolatile silicon memory device demonstrates high-speed write capability (≤100 ns), long retention time (100 s), and nondestructive read capability (1000 s), with high sensing current margin (≈109) and reliable endurance (≥109) at low voltages (≤1 V). Disturb immunity for memory array operations is also observed. This study demonstrates that the proposed quasi-nonvolatile silicon memory device is a promising candidate that can revolutionize the entire memory hierarchy.
Bibliographical noteFunding Information:
This work was supported in part by the MOTIE (Ministry of Trade, Industry and Energy) (10067791) and KSRC (Korea Semiconductor Research Consortium) support program for the development of future semiconductor devices. It was also supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT) (2020R1A2C3004538), the Brain Korea 21 Plus Project of 2020 through the NRF funded by the Ministry of Science, Information and Communications Technology and Future Planning, and the Korea University Grant.
© 2020 The Authors. Advanced Materials Technologies published by Wiley-VCH GmbH
- field-effect transistors
- memory hierarchy
- positive feedback loop
- quasi-nonvolatile memory
ASJC Scopus subject areas
- Materials Science(all)
- Mechanics of Materials
- Industrial and Manufacturing Engineering