Relaxing the inclusion property in cache only memory architecture

Jinseok Kong; Gyungho Lee

doi:10.1007/bfb0024733

Relaxing the inclusion property in cache only memory architecture

Jinseok Kong, Gyungho Lee

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Citations (Scopus)

Abstract

Cache only memory architecture (COMA), even with its additional memory overhead, can incur longer inter/intra-node communication latency than cache-coherent nonuniform memory access (CCNUMA). Some studies on COMA suggest that the inclusion property applied between the processor cache and its local memory is one of the major causes of less-than-desirable performance. The inclusion property creates extra accesses to the slow local memory. We consider the binding time of data address to the local memory to be an important factor related to the long latency in COMA. This paper considers the inclusion property in COMA and introduces a variant of COMA, dubbed Dynamic Memory Architecture (DYMA), where the local memory is utilized as a backing store for blocks discarded from the processor cache. Thus, by delaying the binding time, the long latency due to the inclusion property can be avoided. This paper examines the potential performance of DYMA compared to COMA and CC-NUMA.

Original language	English
Title of host publication	Euro-Par 1996 Parallel Processing - 2nd International Euro-Par Conference, Proceedings
Editors	Luc Bouge, Pierre Fraigniaud, Anne Mignotte, Yves Robert
Publisher	Springer Verlag
Pages	435-444
Number of pages	10
ISBN (Print)	3540616276, 9783540616276
DOIs	https://doi.org/10.1007/bfb0024733
Publication status	Published - 1996
Event	2nd International Euro-Par Conference on Parallel Processing, Euro-Par 1996 - Lyon, France Duration: 1996 Aug 26 → 1996 Aug 29

Publication series

Name	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume	1124
ISSN (Print)	0302-9743
ISSN (Electronic)	1611-3349

Other

Other	2nd International Euro-Par Conference on Parallel Processing, Euro-Par 1996
Country/Territory	France
City	Lyon
Period	96/8/26 → 96/8/29

Bibliographical note

Publisher Copyright:
© 1996, Springer Verlag. All rights reserved.

ASJC Scopus subject areas

Theoretical Computer Science
General Computer Science

Access to Document

10.1007/bfb0024733

Cite this

Kong, J., & Lee, G. (1996). Relaxing the inclusion property in cache only memory architecture. In L. Bouge, P. Fraigniaud, A. Mignotte, & Y. Robert (Eds.), Euro-Par 1996 Parallel Processing - 2nd International Euro-Par Conference, Proceedings (pp. 435-444). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 1124). Springer Verlag. https://doi.org/10.1007/bfb0024733

Relaxing the inclusion property in cache only memory architecture. / Kong, Jinseok; Lee, Gyungho.
Euro-Par 1996 Parallel Processing - 2nd International Euro-Par Conference, Proceedings. ed. / Luc Bouge; Pierre Fraigniaud; Anne Mignotte; Yves Robert. Springer Verlag, 1996. p. 435-444 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 1124).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Kong, J & Lee, G 1996, Relaxing the inclusion property in cache only memory architecture. in L Bouge, P Fraigniaud, A Mignotte & Y Robert (eds), Euro-Par 1996 Parallel Processing - 2nd International Euro-Par Conference, Proceedings. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 1124, Springer Verlag, pp. 435-444, 2nd International Euro-Par Conference on Parallel Processing, Euro-Par 1996, Lyon, France, 96/8/26. https://doi.org/10.1007/bfb0024733

Kong J, Lee G. Relaxing the inclusion property in cache only memory architecture. In Bouge L, Fraigniaud P, Mignotte A, Robert Y, editors, Euro-Par 1996 Parallel Processing - 2nd International Euro-Par Conference, Proceedings. Springer Verlag. 1996. p. 435-444. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). doi: 10.1007/bfb0024733

Kong, Jinseok ; Lee, Gyungho. / Relaxing the inclusion property in cache only memory architecture. Euro-Par 1996 Parallel Processing - 2nd International Euro-Par Conference, Proceedings. editor / Luc Bouge ; Pierre Fraigniaud ; Anne Mignotte ; Yves Robert. Springer Verlag, 1996. pp. 435-444 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).

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Relaxing the inclusion property in cache only memory architecture

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