ROZK: An Energy-Efficient DNN Accelerator Based on Reconfigurable NoC and Local Zero-Skipping

Zero-skipping is a famous technique to improve the energy efficiency of deep neural network (DNN) accelerators. When the zero-skipping is realized with encoded data using lossless compression, irregular and unpredictable size of data due to inconsistent compression rate incurs several design issues including: 1) load imbalance from irregularity of data stored in buffers; 2) complex routing for accumulation process; and 3) unpredictable memory footprint allocation. In this article, we propose a DNN accelerator named ROZK, which includes: 1) tri-stationary dataflow where each processing element (PE) is equipped with local register files that enable zero-skipping for unstructured zeros in local PEs without encoding data; 2) low-cost lookup table (LUT)-based local zero-skipping scheme; and 3) a reconfigurable network-on-chip (NoC) architecture that supports various stationary types. To further improve the computation utilization by transferring inputs as soon as every computing unit finishes its computations, a cycle prediction scheduler (CPS) is also proposed. Finally, ROZK is connected to a 64-bit RISC-V core-based system-on-chip (SoC) architecture. The SoC architecture has been fabricated in a 28-nm process and verified through various DNN workloads. ROZK achieves throughput of 191 giga operations per second (GOPS) (0% activation sparsity) and 324 GOPS (60% activation sparsity) at 409-MHz operating frequency.